The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 19, 2018
Filed:
Oct. 21, 2015
Macau University of Science and Technology, Macau, MO;
Macau University of Science and Technology, Macau, MO;
Abstract
Recent trends of larger wafer and smaller lot sizes bring cluster tools with frequent lot switches. Practitioners must deal with more transient processes during such switches, including start-up and close-down processes. To obtain higher yield, it is necessary to shorten the duration of transient processes. Much prior effort was poured into the modeling and scheduling for the steady state of cluster tools. In the existing literature, no attention has been turned to optimize the close-down process for single-arm cluster tools with wafer residency constraints. This invention intends to do so by 1) developing a Petri net model to analyze their scheduling properties and 2) proposing Petri net-based methods to solve their close-down optimal scheduling problems under different workloads among their process steps. Industrial examples are used to illustrate the effectiveness and application of the proposed methods.