The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 19, 2018

Filed:

Nov. 06, 2015
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventor:

Andriy Pletenetskyy, Mountain View, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01); G02F 1/1347 (2006.01); G02F 1/1345 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/522 (2006.01); H01L 23/055 (2006.01); H01L 23/057 (2006.01); H01L 23/053 (2006.01); H01L 23/535 (2006.01); H01L 23/13 (2006.01); H01L 23/492 (2006.01); H01L 23/32 (2006.01); H01L 23/04 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
G02F 1/1347 (2013.01); G02F 1/1345 (2013.01); G02F 1/13452 (2013.01); H01L 21/486 (2013.01); H01L 23/04 (2013.01); H01L 23/053 (2013.01); H01L 23/055 (2013.01); H01L 23/057 (2013.01); H01L 23/13 (2013.01); H01L 23/32 (2013.01); H01L 23/4922 (2013.01); H01L 23/49811 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 23/5226 (2013.01); H01L 23/535 (2013.01); H01L 23/562 (2013.01); H01L 24/05 (2013.01); H01L 24/49 (2013.01); H01L 24/85 (2013.01); G02F 1/136277 (2013.01); G02F 2001/13478 (2013.01); G02F 2201/42 (2013.01); G02F 2202/28 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01);
Abstract

Disclosed is a low-profile microdisplay module that comprises a package substrate, a microdisplay chip disposed over a first surface of the package substrate, and a plurality of conductive vias. The plurality of conductive vias are electrically coupled to the microdisplay chip and disposed through the package substrate to a second surface of the package substrate, the second surface being opposite and parallel to the first surface. The microdisplay module further comprises a flexible flat circuit connector coupled to the plurality of conductive vias at the second surface of the package substrate.


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