Keelung, Taiwan

Yung-Jung Jan


Average Co-Inventor Count = 1.9

ph-index = 6

Forward Citations = 176(Granted Patents)


Location History:

  • Keelung, TW (1993 - 1994)
  • Taipei Hsien, TW (1995 - 1996)

Company Filing History:


Years Active: 1993-1996

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6 patents (USPTO):Explore Patents

Title: Yung-Jung Jan: Innovator in Variable Length Decoding and Delay Circuits

Introduction

Yung-Jung Jan is a prominent inventor based in Keelung, Taiwan. He has made significant contributions to the field of variable length decoding and delay circuits, holding a total of 6 patents. His innovative work has advanced the efficiency and effectiveness of data processing technologies.

Latest Patents

One of his latest patents is a "Variable Length Decoder Using Serial and Parallel Processing." This invention presents a variable length decoder architecture that receives a coded bit stream directly without buffering. The bit-serial variable length decoder determines the end of every variable length code word but does not decode the code words. Instead, the variable length code words are buffered and decoded by multiple VLDs arranged in parallel, achieving high throughput with minimal buffer capacity.

Another notable patent is the "Single RAM Multiple-Delay Variable Delay Circuit." This invention utilizes a random access memory (RAM) array to provide adjustable delays for blocks of input data. By employing a single RAM array, the invention economically provides individual delays to multiple blocks of input data, ensuring that the total of the individual delays does not exceed the RAM's capacity. This design allows for simultaneous single-port processing of data blocks, enhancing efficiency and reducing manufacturing costs.

Career Highlights

Yung-Jung Jan is affiliated with the Industrial Technology Research Institute, where he continues to innovate and develop new technologies. His work has been instrumental in advancing the capabilities of data processing systems, making them more efficient and cost-effective.

Collaborations

He has collaborated with notable coworkers, including Ching-Hsiang Yang and Jinn-Shyan Wang, contributing to various projects that enhance the field of technology.

Conclusion

Yung-Jung Jan's contributions to variable length decoding and delay circuits have significantly impacted the technology landscape. His innovative patents reflect his dedication to advancing data processing technologies, making him a key figure in his field.

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