Pei-Ren Jeng

Title: Pei-Ren Jeng: Innovator in Electrical Properties of Gate Structures

Introduction

Pei-Ren Jeng is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in improving the electrical properties of gate structures.

Latest Patents

Pei-Ren Jeng holds a patent titled "Method for improving the electrical property of gate in polycide." This invention discloses a method that enhances the electrical properties of gates in polycide structures. The process begins with the formation of a gate oxide layer on a silicon substrate. Key steps include forming a highly-doped polysilicon layer on the gate oxide, followed by an undoped amorphous silicon layer, and finally a tungsten silicon layer. The invention addresses issues such as the peeling of tungsten silicide after annealing and the degradation of electrical properties due to fluorine atom diffusion.

Career Highlights

Pei-Ren Jeng is currently employed at Holtek Microelectronics Inc., where he continues to innovate in the semiconductor industry. His work has led to advancements that are crucial for the development of more efficient electronic devices.

Collaborations

Pei-Ren collaborates with Chun-Cho Chen, a talented woman in the field, contributing to the advancement of their projects and innovations.

Conclusion

Pei-Ren Jeng's contributions to semiconductor technology through his innovative patent demonstrate his commitment to enhancing electrical properties in gate structures. His work continues to influence the industry positively.