Stmicroelectronics S.r.l.

Zsolt Miklos Kovàcs-Vajna

Anna Richelli

Luigi Colalongo

Fabrizio Torricelli

Luca Milani

A non-volatile memory includes cells arranged in rows and columns. Each memory cell includes an access portion and a control portion. The access and control portions share an electrically floating layer of conductive material defining a first capacitive coupling with the access portion and a second capacitive coupling with the control portion. The first capacitive coupling defines a first capacity lower than a second capacity defined by the second capacitive coupling. The control portion is configured so that an electric current extracts charge carriers from the electrically floating layer through Fowler-Nordheim tunneling to store a first logic value in the memory cell. The access portion is configured so that an electric current injects charge carriers in the electrically floating layer by injection of band-to-band tunneling-induced hot electrons to store a second logic value, respectively, in the memory cell.

Embedded non-volatile memory with single polysilicon layer memory cells erasable through band to band tunneling induced hot electron and programmable through Fowler-Nordheim tunneling

A non-volatile memory includes memory cells arranged in rows and columns. Each memory cell includes a program/read portion and an erase portion that share an electrically floating layer of conductive material defining a first capacitive coupling with the program/read portion and a second capacitive coupling with the erase portion. The first capacitive coupling defines a first capacitance greater than a second capacitance defined by the second capacitive coupling. The erase portion is configured so that an electric current extracts charge carriers from the electrically floating layer to store a first logic value in the memory cell. The program/read portion is further configured so that an electric current injects charge carriers in the electrically floating layer to store a second logic value in the memory cell.

Embedded non-volatile memory with single polysilicon layer memory cells programmable through channel hot electrons and erasable through fowler-nordheim tunneling

A non-volatile memory includes a plurality of memory cells arranged in a plurality of rows and columns. Each memory cell includes a read portion and a control portion. The read portion and the control portion share an electrically floating layer of conductive material defining a first capacitive coupling with the read portion and a second capacitive coupling with the control portion. The first capacitive coupling defines a first capacity greater than a second capacity defined by the second capacitive coupling. The control portion is configured so that an electric current injects or extracts charge carriers into or from the electrically floating layer to store of a first logic value or a second logic value, respectively, in the memory cell.

Embedded non-volatile memory with single polysilicon layer memory cells programmable through band-to-band tunneling-induced hot electron and erasable through fowler-nordheim tunneling

An embodiment of a nonvolatile-memory device includes: a body accommodating at least a first semiconductor well and a second semiconductor well; an insulating structure; and at least one nonvolatile memory cell. The cell includes: at least one first control region in the first well; conduction regions in the second well; and a floating gate region, which extends over portions of the first well and of the second well, is capacitively coupled to the first control region and forms a floating-gate memory transistor with the conduction regions. The insulating structure includes: first insulating regions, which separate the floating gate region from the first control region and from the second well outside the conduction regions and have a first thickness; and second insulating regions, which separate the floating gate region from the first well outside the first control region and have a second thickness greater than the first thickness.

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Brescia, Italy

Zsolt Miklos Kovàcs-Vajna