Cadence Design Systems, Inc.

Zsolt Haag

Keith Dennison

Ian Gebbie

Ian Campbell Dennison

Nicholas Forde

Monika Ravi Kalarickel

The present embodiments relate to reconfiguration of a schematic. According to some aspects, embodiments relate to a method in which a schematic of a circuit is displayed on a graphical user interface of a computing device. The schematic can include a plurality of circuit objects, and at least one interconnect connecting the plurality of circuit objects to define a circuit connectivity. The method further includes defining a schematic reference point on the schematic. The method also includes determining a distance of each circuit object of the plurality of circuit objects from the schematic reference point. The method also includes increasing the distance of each circuit object of the plurality of circuit objects from the schematic reference point relative to a respective size of each circuit object, wherein increasing the distance includes multiplying the distance by a scaling factor. The at least one interconnect is reconfigured to maintain circuit connectivity.

Topology preserving schematic transformations for RF net editing

A method, mechanism, and system for determining an effective resistance for a network of resistors, irrespective of the number of terminals is provided. An aspect of an approach relates to the reduction of any network of resistors to a single resistance value. Another aspect of an approach relates to the application of a power loss calculation to determine the effective resistance. Yet another aspect of an approach relates to the integration of the method/mechanism with an analog simulator.

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Livingston, United Kingdom

Zsolt Haag