Qualcomm Incorporated

Zongyu Dong

Vijayakumar Dhanasekaran

Arash Mehrabi

Dongyang Tang

Chien-Chung Yang

Dongwon Seo

Andrew Weil

Certain aspects of the present disclosure provide a digital-to-analog converter (DAC). The DAC generally includes a plurality of transistors selectively coupled to an output of the DAC, and a biasing circuit coupled to gates of the plurality of transistors. The biasing circuit may include a first transistor having a gate coupled to a drain of the first transistor, a first buffer having an input coupled to the gate of the first transistor, a second transistor having a gate coupled to an output of the first buffer, a first resistive-capacitive (RC) circuit having a first resistive element and a first capacitive element, the first RC circuit being coupled between the gate of the first transistor and the gate of the second transistor, and a first switch coupled between the first resistive element and the first capacitive element.

Digital-to-analog converter (DAC) design with reduced settling time

An apparatus includes a reference voltage circuit having a bandgap input and a reference voltage output. The apparatus also includes a digital-to-analog converter (DAC) coupled to the reference voltage output and having a digital signal input. The apparatus includes an amplifier having a first input coupled to an output of the DAC. The first input is coupled to an output of the amplifier via a feedback resistor. The apparatus includes a resistor coupled to the reference voltage output and having a body terminal coupled to the output of the amplifier.

Amplifier with nonlinearity compensation

An apparatus includes an amplifier having a first input and a second input. A first feedback resistor is coupled to the first input and has a first body terminal coupled to a first bias terminal. A second feedback resistor is coupled to the second input and has a second body terminal coupled to a second bias terminal.

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Zongyu Dong