University of Electronic Science and Technology of China

Zonglin Ye

Yao Xiao

Zheng Wang

Qian Xie

Xinlin Geng

The disclosure relates to mixed analog-digital circuits, and more specifically a low-noise millimeter-wave fractional-N frequency synthesizer. It overcomes quantization noise and fractional spurs caused by the limited dynamic range and nonlinearity of time error amplifiers (TA) in traditional phase-locked loop structures based on TA. In addition to the traditional structure, the synthesizer includes a coarse digital-to-time converter (CDTC), a fine digital-to-time converter (FDTC), and DTC non-linearity calibration circuits. By inserting the CDTC and FDTC before and after the TA, respectively, the variance of the input phase difference of the TA can be reduced, thereby improving the TA linearity and suppressing the quantization noise and spur generated by fractional-N operation. Furthermore, by using non-linearity calibration, the non-linearity of DTC and TA can be compensated to avoid large quantization noise and spur while the second order quantization noise reshaping is maintained. Furthermore, a high-gain TA can increase the resolution of the FDTC.

Growing community of inventors

Chengdu, China

Zonglin Ye