Samsung Electronics Co., Ltd.

ZongLiang Huo

In-Seok Yeo

Subramanya Mayya

Xiaofeng Wang

Kihyun Hwang

Myoungbum Lee

Sunjung Kim

Seungmok Shin

A method of forming a microelectronic device includes forming a groove structure having opposing sidewalls and a surface therebetween on a substrate to define a nano line arrangement region. The nano line arrangement region has a predetermined width and a predetermined length greater than the width. At least one nano line is formed in the nano line arrangement region extending substantially along the length thereof and coupled to the surface of the groove structure to define a nano line structure. Related devices are also discussed.

Nano line structures in microelectronic devices

Provided are a nonvolatile memory device and a method for fabricating the same. The nonvolatile memory device may include a stacked structure, a semiconductor pattern, an information storage layer, and a fixed charge layer. The stacked structure may be disposed over a semiconductor substrate. The stacked structure may include conductive patterns and interlayer dielectric patterns alternately stacked therein. The semiconductor pattern may be connected to the semiconductor substrate by passing through the stacked structure. The information storage layer may be disposed between the semiconductor pattern and the conductive patterns. The fixed charge layer may be disposed between the semiconductor pattern and the interlayer dielectric pattern. The fixed charge layer may include fixed charges. Electrical polarity of the fixed charges may be equal to electrical polarity of majority carriers of the semiconductor pattern.

Nonvolatile memory device having a fixed charge layer

Methods of forming nano line structures in microelectronic devices

Growing community of inventors

Gyeonggi-do, South Korea

ZongLiang Huo