Yangtze Memory Technologies Co., Ltd.

Zongke Xu

Bin Yuan

Xiangning Wang

Jingjing Geng

Qiangwei Zhang

Jianzhong Wu

Zhu Yang

Chen Zuo

Wei Xu

Bo Xu

ZongLiang Huo

Zhen Guo

Beibei Li

A semiconductor device includes a stack of alternating word line layers and insulating layers. The stack includes a core area, a stair step area, and, optionally, a dummy transition area connecting the core area to the stair step area. The semiconductor device also includes a gate line (GL) trench through the stack extending from the core area through the dummy transition area to the stair step area. The GL trench has a first width within the core area and a second width within the stair step area that is different from the first width. The semiconductor device also includes a first channel structure formed through the stack within the core area, and a stair step contact (SCT) formed through at least a portion of the stack within the stair step area. The SCT connects one of the word line layers of the stack within the stair step area.

Gateline mask design for removing sacrificial gateline polysilicon within stair step area

A method for forming a three-dimensional (3D) memory device includes forming a dielectric stack including a plurality of first/second dielectric layer pairs over a substrate, forming a plurality of channel structures extending in a lateral direction in a core region of the dielectric stack, forming a staircase structure including a plurality of stairs extending along the lateral direction in a staircase region of the dielectric stack, forming a first drain-select-gate (DSG) cut opening extending in the lateral direction in the core region and a second DSG cut opening in the staircase region, and forming a first DSG cut structure in the first DSG cut opening and a second DSG cut structure in the second DSG cut opening.

Three-dimensional memory devices with drain-select-gate cut structures and methods for forming the same

A three-dimensional (3D) memory device includes a staircase, a plurality of contacts, a plurality of groups of support structures, and a fourth support structure between adjacent groups of support structures through the staircase. The plurality of groups of support structures are arranged in a first direction. Each of the groups of support structures includes three support structures. Projections of the three support structures form a triangular shape in a plane parallel to the first direction. The plurality of contacts each is surrounded by a respective group. A projection of one of the contacts overlaps with the triangular shape of the respective group.

Three-dimensional memory devices and methods for forming the same

The present disclosure relates to a three-dimensional memory and a method for manufacturing the same. The three-dimensional memory includes a gate stack structure including a core area and a step area which are disposed in juxtaposition and in direct contact in a first direction; a dummy separation structure penetrating through the step area in the first direction; and a gate separation structure penetrating through the core area in the first direction, the gate separation structure having a first end in contact with the dummy separation structure in the first direction, the dummy separation structure having a second end in contact with the gate separation structure in the first direction, and the first end being located within the second end.

Three-dimensional memory and method for manufacturing the same

Aspects of the disclosure provide methods for fabricating semiconductor devices. In some examples, a method for fabricating a semiconductor device includes forming a stack of layers having a first region and a second region. The stack of layers includes at least a first layer. The method then forms a hard mask layer on the stack of layers in the first region. Then, the method includes patterning the stack of layers in the second region of the semiconductor device. The patterning of the stack of layers in the second region removes a portion of the stack of layers in the second region, and exposes a side of the stack of layers. The method further includes covering at least the side of the stack of layers with a second layer that has a lower remove rate than the first layer, and then the method includes removing the hard mask layer.

Semiconductor device fabrication

The present disclosure provides a method for forming a three-dimensional (3D) memory. In an example, the method includes forming a stack structure having interleaved a plurality of stack first layers and a plurality of stack second layers, forming a stair in the stack structure, the stair having one of the stack first layers on a top surface, and forming a layer of sacrificial material having a first portion over a side surface of the stair and a second portion over the top surface of the stair. The method also includes partially removing the first portion of the layer of sacrificial material using an anisotropic etching process and removing a remaining portion of the first portion of the layer of sacrificial material using an isotropic etching process.

Methods for forming stairs in three-dimensional memory devices

Embodiments of structures and methods for forming three-dimensional (3D) memory devices are provided. In an example, a 3D memory device includes a core region and a staircase region. The staircase region includes a plurality of stairs each has at least a conductor/dielectric pair extending in a lateral direction. The staircase region includes a drain-select-gate (DSG) cut structure extending along the lateral direction and a vertical direction, and a plurality of support structures extending in the DSG structure along the vertical direction. Of at least one of the support structures, a dimension along the lateral direction is greater than a dimension along a second lateral direction perpendicular to the lateral direction.

A three-dimensional (3D) memory device is provided. In an example, the 3D memory device includes a staircase and a plurality of groups of support structures through the staircase. The plurality of groups of support structures are arranged in a first direction, and each of the groups of support structures comprises three support structures, wherein projections of the three support structures form a triangular shape in a plane parallel to the first direction.

Growing community of inventors

Wuhan, China

Zongke Xu