Boe Technology Group Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Zixuan Wang

Yuting Chen

Xianrui Qian

Bo Li

Fei Fei Li

Peng Chen

Fei Wang

Tong Yang

Suzhen Mu

Rui Ma

Xiaoye Ma

Guolei Wang

Xiping Wang

Xiong Xiong

Donghui Zhang

Zhou Rui

A shift register unit circuit includes an input sub-circuit, a pull-up sub-circuit, a pull-down control sub-circuit, a pull-down sub-circuit, and a voltage regulating sub-circuit. The input sub-circuit receives an input signal from a signal input terminal to control a potential of a pull-up node. The pull-up sub-circuit outputs a gate driving signal to an output terminal under control of the potential of the pull-up node and a signal from a first signal terminal. The pull-down control sub-circuit conducts a pull-down node with a first node under control of a signal from the second signal terminal. The pull-down sub-circuit conducts the pull-up node with the first node and the turn-down signal terminal with the output terminal under control of a potential of the pull-down node. The voltage regulating sub-circuit conducts the first node with the turn-down signal terminal under control of a potential of the first node.

Shift register unit circuit and driving method, shift register, gate drive circuit, and display apparatus

A pixel circuit and a driving method thereof, and a display panel. The pixel circuit includes a driver circuit, a data writing circuit, a storage circuit, a light emitting element and a bias circuit. The driver circuit controls a drive current for driving the light emitting element to emit light. The data writing circuit writes a data signal to the control terminal of the driver circuit in response to a scan signal. The storage circuit stores the data signal written by the data writing circuit. The light emitting element emits light according to the drive current. The bias circuit applies a bias voltage to the second terminal of the light emitting element in response to a bias starting signal and according to a bias voltage amplitude signal, so as to reverse bias the light emitting element.

Pixel circuit and driving method thereof, and display panel

The present disclosure provides a pixel driving circuit, a driving method thereof, and a display device, and relates to the field of display technology. The pixel driving circuit includes a first driver, a second driver, and a light emitting element. The first driver is configured to generate a first driving current. The second driver is configured to generate a second driving current. The first driving current and the second driving current alternately drive the light emitting element as a main driving current.

Pixel driving circuit, driving method thereof, and display device

A shift register circuit includes a pull-up control sub-circuit, a pull-up sub-circuit and a shutdown auxiliary sub-circuit. The pull-up control sub-circuit is configured to transmit a voltage from the signal input terminal to the pull-up node under the control of the voltage from the signal input terminal. The shut-down auxiliary sub-circuit is configured to pull down a voltage of the pull-up node to a voltage of the discharge voltage terminal under the control of a voltage from the pull-up node. The pull-up sub-circuit is configured to transmit a voltage from the clock signal terminal to the first signal output terminal under the control of a voltage from the pull-up node. The first signal output terminal is configured to be connected to a gate line.

Shift register circuit and method of controlling the same, gate driving circuit, and display device

A shift register circuit includes a noise reduction sub-circuit and a pull-down node control sub-circuit. A control end of the noise reduction sub-circuit is connected to a pull-down node, the noise reduction sub-circuit is connected to a first voltage input end. The pull-down node control sub-circuit includes a first pull-down node control sub-circuit and a second pull-down node control sub-circuit. The second pull-down node control sub-circuit controls the pull-down control node to be connected to a first clock signal input end when the first clock signal input end inputs a first level, the pull-down node to be connected to the first clock signal input end when a potential of the pull-down control node is at the first level, so that the potential of the pull-down node is at a first level and a noise reduction transistor included in the noise reduction sub-circuit is turned off.

Shift register circuit, method for driving the same, and display device

There is provided in the present disclosure a shift register unit, including: a pull-up control circuit, connected to a signal input terminal and a pull-up node; a pull-up circuit, connected to the pull-up node, a first clock signal terminal and a signal output terminal; a pull-down circuit, connected to a pull-down node, the pull-up node, the signal output terminal and a power supply voltage terminal, and configured to pull down voltages of the pull-up node and the signal output terminal to a voltage of the power supply voltage terminal under the control of the pull-down node; a first pull-down control circuit, connected to a second clock signal terminal, a pull-down control signal terminal, the pull-down node and the power supply voltage terminal, and configured to pull up the voltage of the pull-down node to a valid pull-down level under the control of the pull-down control signal terminal.

Shift register unit and driving method thereof, driving apparatus and display apparatus

The present application discloses a gate driving circuit having multiple shift register units cascaded one after another in multiple stages. The multiple shift register units are grouped into a plurality of groups of shift register units, each of the plurality of groups of shift register units having a plurality of shift register units. Each of the plurality of groups of shift register units includes a single pull-down control sub-circuit.

Gate driving circuit, display apparatus, and method of driving gate driving circuit

The present disclosure relates to a pixel driving circuit and a driving method for the same and a display panel. The pixel driving circuit includes a driver unit, a circuit switching unit, and a storage capacitor unit. The driver unit includes a first sub-driver unit and a second sub-driver unit. The circuit switching unit has a first switching unit and a second switching unit. Two terminals of the first switching unit are electrically connected to a first terminal of the light emitting unit and the first sub-driver unit, respectively, two terminals of the second switching unit are electrically connected to the light emitting unit and the second sub-driver unit, respectively, and the circuit switching unit is configured to switch conductive states of the first switching unit and the second switching unit.

Pixel driving circuit having dual driver unit, driving method for the same and display panel

A display device, a gate drive circuit, a shift register and its control method are described. The shift register includes: an input circuit, a first output circuit, a second output circuit, a control circuit and an output drive circuit, wherein the output drive circuit is connected to a second signal input terminal, a pull-up node, a control terminal of the second output circuit and a low voltage signal terminal, and is configured to write a voltage of the second signal input terminal into the control terminal of the second output circuit and superimpose a voltage of the pull-up node onto the control terminal of the second output circuit under the control of a second input signal provided at the second signal input terminal, such that the second output circuit is fully turned on to ensure that it has good output capability when working at a low temperature.

Display device, gate drive circuit, shift register and control method for the same

A shift register, a gate driving circuit, a display panel and a driving method. The shift register includes: an input circuit, connected with a pull-up node and an input signal terminal respectively; a reset circuit, connected with the pull-up node, a reset signal terminal and a first power terminal respectively to receive a first power voltage; an output circuit, connected with the pull-up node, a clock signal terminal and an output terminal respectively; and an output pull-down circuit, connected with the output terminal and configured to write a second power voltage to the output terminal, where the first power voltage is different from the second power voltage.

Shift register, gate driving circuit, display panel and driving method

A shift register, a gate driving circuit, a display device and a driving method. The shift register includes: a driving unit, configured to supply a gate line signal to a corresponding pixel unit group; and a compensation circuit provided corresponding to the driving unit; where the compensation circuit is configured to compensate for one or more threshold voltage offsets of one or more transistors in the driving unit.

Growing community of inventors

Beijing, China

Zixuan Wang