National Semiconductor Corporation

Ziv Hershman

Leonid Azriel

Assaf Koren

The present invention is directed to circuitry for detecting and protecting against over-clocking attacks on hardware modules. The circuitry preferably comprises a test signal, a delay path for providing a delayed signal of the test signal, and circuitry for comparing the logical state of the test signal and the delayed signal and issuing an attack indication whenever the signals are different.

Circuitry and method for detecting and protecting against over-clocking attacks

Apparatus for limiting an output signal frequency of an on-chip clock generator is presented. Electronic circuitry compares the value of a ratio between the internal clock signal frequency and the reference clock input signal frequency with minimum and maximum calibration word signals, in order to determine if the reference clock input signal frequency is within a permitted range. If the reference clock input signal frequency is not within the permitted range, the apparatus sends a tamper alert to the chip or to a system, and the output clock signal frequency is not changed according to the reference clock input signal frequency, thereby protecting the chip from erroneous or tampered clock signal. The output clock signal is buffered from the reference clock input signal insuring that the output clock signal frequency is within the permitted range. The apparatus can operate without providing the reference input clock signal.

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Tel Aviv, Israel

Ziv Hershman