Marvell International Limited

Marvellworld Trade Ltd.

Innogrit Technologies Co., Ltd.

Nyquist Semiconductor Limited

Leland Stanford Junior University

Zining Wu

Gregory Burd

Xueshi Yang

Pantas Sutardja

Nedeljko Varnica

Panu Chaichanavong

Shaohua Yang

Michael Madden

Jun Xu

Heng Tang

Hongwei Song

Nitin Nangare

Jie Chen

Seo-How Low

Ke Han

Tony Yoon

Siu-Hung Fred Au

Aditya Ramamoorthy

Ichiro Kikuchi

Hongxin Song

Bo Fu

Toai Doan

Engling Yeo

Mats Oberg

Xiaoming Zhu

Adina Matache

Lau Nguyen

Henri Sutioso

Yu-Yao Chang

Chi-Kong Lee

Eugene Pan

Wei Jiang

Lin Chen

Son Hong Ho

Kapil Jain

Vincent M Wong

Soichi Isono

Nersi Nazari

Gang Zhao

Hongying Sheng

Zaihe Yu

Lingyan Sun

Farshid Rafiee Rad

Moyang Chen

Han Zhang

Peter Kou

John Matthew Cioffi

Winston Lee

Kok-Wui Cheong

Chenrong Xiong

Saeed Azimi

Runzi Chang

Jingfeng Liu

Sasan Cyrusian

Chung-Li Wang

Andrei Vityaev

Tze Lei Poo

Chiahung Chien

Nedelijko Varnica

Tang Heng

Fred Siu-Hung Au

Heng Teng

Won-Joon Choi

Johnny Li-Shung Fan

Greg Burd

The present disclosure relates to methods and systems for evaluating a storage medium. The method may include receiving, via a user interface of a host, a user request to evaluate a storage medium coupled to a first controller. The method may also include determining whether there is a first binding history table associated with the storage medium stored in the host. In response to a determination that there is no first binding history table stored in the host, the method may include retrieving a binding history table from the storage medium via the first controller and determining the storage medium as a second-hand storage medium if there is at least one second controller different from the first controller in the binding history table.

Systems and methods for evaluating a storage medium

A method including determining that a memory unit is available for a channel for communication between a storage controller and a non-volatile storage device, the memory unit being for temporary storage for encoded data for transmission through the channel; allocating the memory unit to that channel; and updating a memory mapping entry corresponding to the memory unit. The memory mapping entry is stored in the storage controller. Updating a memory mapping entry may be based on reading/write tasks. The memory mapping entry may indicate a cross channel status, an operation mode and an identifier of the channel. The method may include determining the channel being stuck due to memory shortage and mapping more memory units to the channel.

Systems and methods for an ECC architecture with memory mapping

Systems, apparatus and methods are provided for providing an error correction code (ECC) architecture with flexible memory mapping. An apparatus may include an error correction code (ECC) engine, a multi-channel interface for one or more non-volatile storage devices, a memory including a plurality of memory units, a storage containing a plurality of mapping entries to indicate allocation status of the plurality of memory units and a memory mapping manager. The plurality of memory units may be coupled to the ECC engine and the multi-channel interface. The memory mapping manager may be configured to control allocation of the plurality of memory units and set allocation status in the plurality of mapping entries.

Systems and methods are provided for decoding data read from non-volatile storage devices. A method that may include decoding a first codeword read from a storage location of a non-volatile storage device using a first decoder without soft information, determining that the first decoder has failed to decode the first codeword, decoding the first codeword using a second decoder without soft information, determining that the second decoder has succeeded in decoding the first codeword, generating soft information associated with the storage location using decoding information generated by the second decoder and decoding a subsequent codeword from the storage location using the soft information associated with the storage location. The second decoder may be more powerful than the first decoder.

Systems and methods for decoding codewords in a same page with historical decoding information

Systems, apparatus and methods are provided for low temperature management of a storage system. An apparatus may include a temperature sensor to generate a temperature reading, a timer configured with a time interval, a backup battery, one or more non-volatile memory (NVM) devices and a storage controller. The storage controller may be configured to: maintain a standby mode for low temperature management until a host electronic system has been turned off, start the timer and check the temperature reading when the host electronic system is turned off, determine that the temperature reading is below a temperature threshold, set the time interval based on the temperature reading, receive an interrupt from the timer when the timer counts to the time Interval, and perform low-temperature management operations for data stored in the one or more NVM devices using power supplied by the backup battery.

System and method for managing solid state storage devices in low temperature environment

Systems and methods are provided for reading data from non-volatile storage devices and decoding the read data. A method may include obtaining a unique identifier for a storage location to be read, retrieving from a memory an adjustment to read reference voltage (Vref) associated with the unique identifier, performing a read operation on the storage location using a read reference voltage adjusted by the adjustment to Vref, decoding data read from the storage location in a decoding process and updating the adjustment to Vwith decoding information generated during the decoding process.

Selecting read reference voltage using historical decoding information

Systems and methods are provided for decoding data read from non-volatile storage devices. A method may comprise receiving a chunk of data read from a physical location of a non-volatile storage device and searching a memory for soft information associated with the physical location using a unique identifier associated with the physical location. The soft information may be generated from one or more previous decoding processes on previous data from the physical location. The method may further comprise retrieving the soft information identified by the unique identifier associated with the physical location from the memory, decoding the chunk of data with the soft information indicating reliability of bits in the chunk of data and updating the soft information with decoding information generated during the decoding.

Systems and methods for decoding error correcting codes with historical decoding information

Apparatus and methods are provided for managing operations of a semiconductor chip. In an exemplary embodiment, there is provided a semiconductor chip that may comprise a temperature sensor, a thermal heater, a processor and thermal control logic. The thermal control logic may be configured to: determine that a first temperature read-out from the temperature sensor reaches a first temperature threshold value, turn on the thermal heater, determine that a second temperature read-out from the temperature sensor reaches a second temperature threshold value that is lower than the first temperature threshold value, suspend functions of the processor, determine that a third temperature read-out from the temperature sensor reaches the first temperature threshold value, resume the functions of the processor, determine that a fourth temperature read-out from the temperature sensor reaches a third temperature threshold value that is higher than the first temperature threshold value and turn off the thermal heater.

On-die thermal management for VLSI applications

Systems, apparatus and methods are provided for providing fast non-volatile storage access with ultra-low latency. A method may comprise dividing a user data unit into a plurality of data chunks, generating a plurality of error correction code (ECC) codewords and at least one ECC parity block and transmitting the plurality of ECC codewords and the at least one ECC parity block to a plurality of channels of the non-volatile storage device for each of the plurality of ECC codewords and the at least one ECC parity block to be stored in different channels of the plurality of channels.

Systems and methods for ultra fast ECC with parity

Systems, apparatus and methods are provided for an error correction code (ECC) architecture with reduced decoding latency in error control. An apparatus may comprise control circuitry configured to receive a status report that a decoding task has failed, determine that a higher priority is needed for a re-decoding task, generate a NAND read task having a second priority level higher than a first priority level of the failed decoding task, and generate an ECC re-decoding task having the second priority level.

Systems and methods for an ECC architecture with prioritized task queues

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Los Altos, CA, United States of America

Zining Wu