Taiwan Semiconductor Manufacturing Comp. Ltd.

Zin-Chein Wei

Yuh-Jier Mii

Chih-Hsiung Lee

Chuan-Chieh Huang

A method of fabricating doped polysilicon structures comprising the following steps. A substrate is provided and an undoped polysilicon layer is formed over the substrate. The undoped polysilicon layer is patterned to form at least one undoped polysilicon structure within an N area and at least one undoped polysilicon structure within a P area. The at least one undoped polysilicon structure within the N area is masked, leaving exposed an upper portion of the other at least one undoped polysilicon structure within the P area. The exposed at least one undoped polysilicon structure within the P area is doped to form a P-doped polysilicon structure. An upper portion of the masked at least one undoped polysilicon structure within the N area is unmasked and exposed, and the P-doped polysilicon structure is masked. The exposed at least one undoped polysilicon structure within the N area is doped to form an N-doped polysilicon structure to complete fabrication of the doped polysilicon structures.

Process to define N/PMOS poly patterns

A polishing system is described in which the substrate that is to be polished (generally a silicon wafer) is given three independent, simultaneously applied, modes of motion. These are: rotation of the platen, rotation of the wafer, and orbital motion of the wafer. A machine for realizing this is detailed It includes a crank that is used to cause the wafer to revolve in a closed path on the surface of the polishing pad at the same time that it moves around the circumference of the pad. A method for using this machine to perform CMP is also given. Use of the method and apparatus of this invention leads to a more uniform distribution of slurry during chemical-mechanical polishing.

Chemical-mechanical polishing method and apparatus

A wafer structure and method of forming a wafer structure with all of the dielectric material and conducting material films removed from the outer periphery of the wafer in order to protect the dielectric and conducting films from damage due to wafer handling, storage, or clamping. The dielectric or conducting material is removed from the wafer edge using wafer edge exposure or edge bead rinse methods. The wafer edge exposure method is carried out at the same time the dielectric or conducting layer is being patterned.

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Hsin-Chu, Taiwan

Zin-Chein Wei