Guangdong Zhineng Technology Co., Ltd.

Guangdong Zhineng Technologies, Co. Ltd.

Zilan Li

Shuxin Zhang

Kan Chen

Weibin Chen

The present disclosure relates to a HEMT, which comprises a vertical interface; a channel layer disposed outside of the vertical interface; a channel supply layer disposed outside of the channel layer, wherein a vertical 2 DEG is formed in the channel layer adjacent to an interface between the channel layer and the channel supply layer; a first electrode configured to be electrically connected to the vertical 2 DEG; a second electrode configured to be electrically connected to the vertical 2 DEG; a gate electrode disposed outside of the channel supply layer. The present disclosure also relates to a method of manufacturing a HEMT, which comprises forming a vertical interface; forming a channel layer outside of the vertical interface; forming a channel supply layer outside the channel layer, wherein a vertical 2 DEG is formed in the channel layer adjacent to an interface between the channel layer and the channel supply layer; and forming a first electrode and a second electrode which are electrically connected to the 2 DEG, and a gate electrode which form schottky contact to the 2 DEG.

High electron mobility transistor (HEMT) and method of manufacturing the same

Provided are a semiconductor device and a method for manufacturing same. The device comprises: a substrate, a first insulating layer on the substrate, a plurality of trenches formed in the substrate, a nucleation layer arranged on one side wall of each trench, and a first semiconductor layer formed along the trenches by means of the nucleation layer. The present disclosure facilitates the achievement of one of the following effects: achieving a high height-width ratio and a high integration density, reducing an on-resistance, improving a threshold voltage, achieving a normally-off state, and providing a semiconductor device that has a high power and a high reliability, is suitable for a planarization process, is provided with an easy preparation method, and reduces costs.

Device formed by epitaxial growth from the side surface of a step

The present disclosure provides a non-planar hole channel transistor and a fabrication method thereof. The non-planar hole channel transistor has a substrate, and a surface of the substrate has a step structure comprising a vertical surface. A non-planar channel layer is epitaxially grown laterally with the vertical surface as a core. A barrier layer is formed on the channel layer, so as to simultaneously form a two-dimensional hole gas and/or a two-dimensional electron gas at an interface between the barrier layer and the channel layer.

Non-planar two-dimensional electron gas (2DEG) or two-dimensional hole gas (2DHG) including epitaxially growing an n-type buried layer between first channel and second channel and a method of forming the same

The present disclosure provides a semiconductor device and a manufacturing method thereof. The semiconductor device includes a substrate, a groove formed on the substrate, a channel layer structure grown under restriction of the groove structure, the channel layer structure being exposed from an upper surface of the substrate; a barrier layer covering the exposed channel layer structure, a two-dimensional electron gas and a two-dimensional hole gas respectively formed on a second face and a first face of the channel layer structure, and a source, a gate, and a drain formed on the first face/second face of the channel layer structure, and a bottom electrode formed on the second face/first face of the channel layer structure.

Semiconductor device that comprises an HEMT and an HHMT with a backside contact electrode and the manufacturing method thereof

The present disclosure relates to a semiconductor device, comprising: a groove; a first channel layer positioned within the groove; and a first barrier layer positioned within the groove, wherein a first heterojunction having a vertical interface is included between the first channel layer and the first barrier layer and 2DEG or 2DHG is formed in the first heterojunction. The present disclosure also relates to a method of manufacturing a semiconductor device.

Semiconductor device and method of manufacturing the same

A normally-closed device and a fabrication method thereof, relating to the technical field of semiconductors, is disclosed. The normally-closed device comprises a substrate, an epitaxial layer connected to the substrate comprising a first P-type nitride layer and a modified layer located on two sides of the first P-type nitride layer and formed by modifying a second P-type nitride layer in a preset region, where the first P-type nitride layer and the second P-type nitride layer are formed by epitaxially growing synchronously, a barrier layer connected to the first P-type nitride layer and the modified layer, a gate electrode connected to the barrier layer, and a source electrode and a drain electrode connected to the modified layer.

Normally-closed device and fabrication method thereof

The present disclosure provides an integrated circuit structure of a group III nitride semiconductor, a manufacturing method thereof, and use thereof. The integrated circuit structure is a complementary circuit of HEMT and HHMT based on the group III nitride semiconductor, and can realize the integration of HEMT and HHMT on the same substrate, and the HEMT and the HHMT respectively have a polarized junction with a vertical interface, the crystal orientations of the polarized junctions of the HEMT and the HHMT are different, the two-dimensional carrier gas forms a carrier channel in a direction parallel to the polarized junction, and corresponding channel carriers are almost depleted by burying the doped region.

Integrated circuit structure of group III nitride semiconductor, manufacturing method thereof, and use thereof

The present disclosure relates to a semiconductor device and a method of fabricating the same. The semiconductor device includes: a substrate including a vertical interface; a channel layer disposed outside the vertical interface; and a channel supply layer disposed outside the channel layer; wherein a vertical two-dimensional electron gas 2DEG or two-dimensional hole gas 2DHG is formed in the channel layer adjacent to an interface between the channel layer and the channel supply layer.

High hole mobility transistor (HHMT) and method of manufacturing the same

The present disclosure provides a semiconductor device, a manufacturing method, and electronic equipment. The semiconductor device including: a substrate; an interface, for generating two-dimensional charge carrier gas; a first electrode and a second electrode; and a first semiconductor layer of a first type doping formed on the substrate, wherein first regions and a second region are formed in the first semiconductor layer, wherein in the first regions, the dopant atoms of the first type do not have electrical activity, and in the second region, the dopant atoms of the first type have electrical activity; and the second region includes a portion coplanar with the first regions.

Semiconductor device, manufacturing method and electronic equipment

A semiconductor device and a method of fabricating the same are proposed. The semiconductor device includes a plurality of hole-channel Group III nitride devices and a plurality of electron-channel Group III nitride devices. In the above, the hole-channel Group III nitride devices and the electron-channel Group III nitride devices are arranged in correspondence with each other. The electron-channel Group III nitride device has a fin-shaped channel, and a two-dimensional hole gas and/or a two-dimensional electron gas can be simultaneously formed at an interface between a compound semiconductor layer and a nitride semiconductor layer.

Fin-shaped semiconductor device, fabrication method, and application thereof

The present disclosure provides a driving circuit, a driving IC, and a driving system, relating to the technical field of electronic circuits. The driving circuit comprises a control module and a driving signal output module, the control module is electrically connected to the driving signal output module, and the driving signal output module is configured to be electrically connected to a to-be-driven device, wherein the driving signal output module comprises at least two transistors, and the at least two transistors are epitaxially grown on the same substrate; and the control module is configured to control a closed state of the at least two transistors, so as to control an operation state of the to-be-driven device.

Driving circuit, driving IC, and driving system

The present disclosure relates to a semiconductor device and a method of fabricating the same. The semiconductor device includes: a substrate including a vertical interface; a channel layer disposed outside the vertical interface; and a channel supply layer disposed outside the channel layer; wherein at least one of a vertical two-dimensional electron gas 2DEG and two-dimensional hole gas 2DHG is formed in the channel layer adjacent to an interface between the channel layer and the channel supply layer.

Semiconductor device including high electron mobility transistor or high hole mobility transistor and method of fabricating the same

The present disclosure relates to semiconductor power devices, and in particular, to a high-electron-mobility transistor (HEMT) with high voltage endurance capability and a preparation method thereof. The high-electron-mobility transistor with high voltage endurance capability includes a gate electrode, a source electrode, a drain electrode, a barrier layer, a P-type nitride semiconductor layer and a substrate, wherein the P-type nitride semiconductor layer is between the barrier layer and the substrate, which is insufficient to significantly deplete a two-dimensional electron gas in a channel except a gate stack, the source electrode is in electrical contact with the P-type nitride semiconductor layer, and the source electrode and the drain electrode are both in electrical contact with the two-dimensional electron gas.

High-electron-mobility transistor with high voltage endurance capability and preparation method thereof

The present disclosure provides a semiconductor device and a method of fabricating the same. The device comprises a substrate; a first semiconductor layer formed on the substrate; a second semiconductor layer formed on the first semiconductor layer; the first semiconductor layer having a smaller forbidden band width than the second semiconductor layer; and a first electrode, a second electrode, and a third electrode formed on the second semiconductor layer; the first semiconductor layer corresponding to the third electrode has a strongly P-type doped first region, and the first semiconductor layer corresponding to the second electrode has a weakly P-type doped second region. The present disclosure contributes to achievement of one of the effects of: reducing a gate leakage current, having a high threshold voltage, high power, and high reliability, allowing a low on-resistance and a normally-off state of the device, and providing a stable threshold voltage, so that the semiconductor device has good switching characteristics.

Growing community of inventors

Guangzhou, China

Zilan Li