Micron Technology Incorporated

Ziad R Hatab

Richard D Holscher

Paul D Shirley

David Q Wright

Tony C Krauth

A method and system for protecting global alignment marks during the fabrication of wafers are described. A semiconductor wafer-in-process includes a substrate having one or more global alignment sites, each site having an alignment mark. A photoresist material is deposited over the wafer-in-process, including over the alignment marks. A stepper or other suitable device exposes full field images over the entire wafer-in-process, thus exposing a portion of the photoresist material covering the alignment marks which is developed. A globule of protective material is deposited over the patterned photoresist over the alignment marks, thus protecting them during a subsequent etching step. The globule of protective material can also be deposited over a portion of any other adjacent structures which need protection during etching.

Automated combi deposition apparatus and method

A system and method of reconstructing an image of a structure having periodic variations in index of refraction. Electromagnetic waves are projected onto the structure and the resulting diffracted electromagnetic waves are measured, wherein the step of measuring includes the step of determining a plurality of intensities DE. Refractive terms can then be calculated as a function of the intensities DE.

Diffraction tomography for monitoring latent image formation

The invention encompasses a method of forming photoresist on a semiconductor wafer. A wafer is coated with a first layer of photoresist to define a first photoresist-coated wafer. The first photoresist-coated wafer is placed on a temperature-regulated mass and thermally equilibrated to a temperature. Subsequently, the first photoresist-coated wafer is photo-processed. After the photo-processing, the wafer is coated with a second layer of photoresist to define a second photoresist-coated wafer. The second photoresist-coated wafer is placed on the temperature-regulated mass and thermally equilibrated to the same temperature that the first photoresist-coated wafer had been equilibrated to. Subsequently, the second layer of photoresist is photo-processed. The invention also encompasses a reticle forming method. A layer of masking material is formed over a reticle substrate, and the reticle substrate is then placed on a temperature-regulated mass. The masking material is exposed to a patterning beam while the reticle is on the temperature-regulated mass, and the temperature-regulated mass holds the temperature of the reticle substrate about constant during such exposing.

Methods of photo-processing photoresist

A semiconductor wafer with reduced misalignment errors at its periphery and a method for producing such a semiconductor wafer are described. The wafer includes one or more global alignment sites, having global alignment marks, on its periphery. Some patterning is located on the global alignment sites, but not covering the global alignment marks. The patterning covering the global alignment sites reduces the amount of non-correctable misalignment errors experienced by the wafer. A buffer zone is provided around the global alignment marks to inhibit patterning over the marks.

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Boise, ID, United States of America

Ziad R Hatab