Semiconductor Manufacturing International (shanghai) Corporation

Semiconductor Manufacturing International (beijing) Corporation

Semiconductor Manufacturing (shanghai) International Corporation

Semiconductor Manufacturing (beijing) International Corporation

Semiconductor Manufacturing International Corp.

Zhuofan Chen

Haiyang Zhang

Yibin Song

Rongyao Chang

A flash memory device and its manufacturing method, which is related to semiconductor techniques. The flash memory device comprises: a substrate; and a memory unit on the substrate, comprising: a channel structure on the substrate, wherein the channel structure comprise, in an order from inner to outer of the channel structure, a channel layer, an insulation layer wrapped around the channel layer, and a charge capture layer wrapped around the insulation layer; a plurality of gate structures wrapped around the channel structure and arranged along a symmetry axis of the channel structure, wherein there exist cavities between neighboring gate structures; a support structure supporting the gate structures; and a plurality of gate contact components each contacting a gate structure. The cavities between neighboring gate structures lower the parasitic capacitance, reduce inter-gate interference, and suppress the influence from writing or erasing operations of nearby memory units.

Flash memory device and manufacture thereof

A magnetic random access memory includes a memory cell including a first fixed layer, a second fixed layer, and one or more free layers disposed between the first fixed layer and the second fixed layer. The first and second fixed layers are continuous layers and commonly shared by a plurality of memory cells. The magnetic random access memory has a relatively simple structure that not only reduces magnetic interference between memory cells, but also simplifies the fabrication process and increases the integration level.

Device and method for disturbance free 3D MRAM fabrication

The present disclosure relates to the technical field of semiconductors, and discloses a semiconductor device and a manufacturing method therefor. The manufacturing method may include: providing a semiconductor structure, where the semiconductor structure includes a semiconductor fin and an interlayer dielectric layer covering the semiconductor fin, the interlayer dielectric layer having an opening exposing a part of the semiconductor fin; forming a data storage layer at a bottom portion and a side surface of the opening; and filling a conductive material layer in the opening on the data storage layer. The present disclosure facilitate the manufacturing process of the semiconductor device and improves processing compatibility with the CMOS technology.

Semiconductor device and manufacturing method therefor

The present disclosure provides a semiconductor structure and a forming method thereof. The forming method includes forming sacrificial layers and spacer on a dielectric layer, wherein the sacrificial layers and the spacer cover the dielectric layer at the top of a gate and expose the dielectric layer on at least part of source-drain doping layers, the sacrificial layers include the first sacrificial layer located on the dielectric layer at the top of the gate, and side walls of the first sacrificial layer are provided with the spacer; after the sacrificial layers and the spacer is formed, the first sacrificial layer is removed; and the dielectric layer is etched with a patterning layer as a mask, and a first contact hole and second contact holes are formed in the dielectric layer. The embodiments and implementations of the present disclosure can avoid double graphics of the dielectric layer and the alignment error.

Method of forming a semiconductor structure by sacrificial layers and spacer

A semiconductor structure and a method for forming the same are provided. The method includes: providing a base; forming a to-be-etched material layer on the base; forming a mask material layer on the to-be-etched material layer; performing a first doping treatment on a partial region of the mask material layer, where after the first doping treatment is performed, the mask material layer includes a first mask-material-layer part and a to-be-removed second mask-material-layer part, and the first mask-material-layer part is a part that has undergone the first doping treatment or the second mask-material-layer part is a part that has undergone the first doping treatment; forming a first trench in the mask material layer, where the first trench is at least located in the first mask-material-layer part; removing the second mask-material-layer part, and forming a second trench in the remaining mask material layer; removing the to-be-etched material layer exposed from the first trench and the second trench, and forming a target pattern layer; and after the target pattern layer is formed, removing the remaining mask material layer. By using the present disclosure, the pattern precision of the first trench and the second trench is improved, and the pattern precision in the target pattern layer is correspondingly improved.

Semiconductor structure and method for forming same

A magnetic random access memory and its manufacturing method related to semiconductor techniques. The magnetic random access memory comprises a word line, a bit line, and a memory unit positioned between the word line and the bit line, wherein the memory unit comprises a fixture layer connecting the bit line, a free layer connecting the word line, and an insulation layer positioned between the fixture layer and the free layer. This magnetic random access memory has a simpler design than conventional devices and can be manufactured more easily, which improves the integrity of the manufacturing process.

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Shanghai, China

Zhuofan Chen