Boe Technology Group Co., Ltd.

Chongqing Boe Optoelectronics Technology Co., Ltd.

Chengdu Boe Optoelectronics Technology Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Zhuo Xu

Yajie Bai

Jaikwang Kim

Rui Wang

Fei Shang

Xiaoyuan Wang

Hailong Wu

Wu Wang

Yuanbo Zhang

Xiaolin Wang

Heecheol Kim

Haijun Qiu

Yi Dan

Peng Liang

Haipeng Zhu

Min Ran

Shuai Chen

Jingpeng Zhao

Ruilin Bi

Yan Xa Zhou

Xiaofeng Ma

Zhulin Liu

Zhi Zhang

Chen Wang

Jing Yang

Chenyu Chen

Wenbo Chen

Shaoru Li

Zhifu Dong

Zhongliu Yang

Shuang Zhao

Hyungkyu Kim

Yan Fang

Hongting Lu

Wentao Zhu

Ming Deng

Jungho Park

Shouqiang Zhang

Jianbo Fu

Yuqing Zhang

Xing Xiong

Pengyue Zhang

Yongli Ge

Pengcheng Fu

Wenlin Mei

Haigang Yang

Sangsoo Kim

Zijie Tang

Tongguo Ma

Yan Zhou

An array substrate, a display panel, and a driving method of the array substrate are provided. The array substrate includes: a plurality of pairs of gate lines, each pair including a first gate line and a second gate line, and a pixel array, including pixel units arranged into a plurality of rows and a plurality of columns. A scan signal terminal of a pixel unit of an nth column in an mth row of pixel units is connected to the first gate line in an mth pair of gate lines to receive a first scan signal; m and n are positive integers; a reset signal terminal of the pixel unit of the (n+1)th column in the mth row of pixel units is connected to the first gate line in the mth pair of gate lines to receive the first scan signal serving as a first reset signal.

Array substrate, display panel and driving method of array substrate

Provided is a display substrate which includes a base substrate; a plurality of rectangular pixels; at least one irregularly-shaved pixel, disposed in the irregularly-shaved display region, wherein the at least one irregularly-shaped pixel is proximal to the peripheral region relative to the rectangular pixel, and a shape of a boundary line of a side, proximal to the peripheral region, of the each irregularly-shaved pixel matches with a shape of a boundary line of the irregularly-shaved display region; and a black matrix laver.

Display substrate and display device

Disclosed in embodiments of the present disclosure are a driver chip and a display device. The driver chip includes two opposite long edges, and two opposite short edges connected to the long edges; the driver chip includes multiple output pins and multiple input pins; the output pins are close to one of the long edges; the input pins include first input pins, second input pins, and third input pins; the first input pins are close to the long edge opposite to the output pins; the second input pins are close to the short edges; the third input pins are close to the long edge and located on both sides of the output pins.

Driver chip and display device

A mask includes a first light-transmitting portion. The first light-transmitting portion includes a target region and at least one compensation region connected to the target region. A planar pattern of the target region includes a plurality of corners, and a planar pattern of each compensation region extends from one of the plurality of corners. An area of the planar pattern of each compensation region is less than an area of the planar pattern of the target region.

Mask and method for manufacturing the same, exposure system, method for manufacturing a display substrate, and display device

An electrostatic discharge protection circuit, a display substrate and a display apparatus are disclosed. The electrostatic discharge protection circuit includes: a first conductive portion, having an end portion; and at least one electrostatic discharge portion, arranged on a same layer as the first conductive portion and spaced from the end portion of the first conductive portion, the at least one electrostatic discharge portion being configured to discharge electrostatic charges generated at the end portion of the first conductive portion.

Electrostatic discharge protection circuit, display substrate and display apparatus

Disclosed are a first shift register, a driving method for the same, a gate driving circuit and a display device. The first shift register includes a first unit, M second units and N third units. A first signal output terminal of the first unit is connected with M second signal input terminals of the M second units. A second signal output terminal of each second unit is connected with third signal input terminals of N/M third units respectively. The first unit outputs a voltage of a first clock signal terminal to the first signal output terminal and a fourth signal output terminal under the control of a first signal input terminal and a second clock signal terminal and outputs a voltage of a first voltage terminal to the first signal output terminal and the fourth signal output terminal.

First shift register, driving method thereof, gate driving circuit, and display device

Embodiments of the present disclosure provide an array substrate, a display panel, and a display apparatus. The array substrate includes: a display region for displaying an image; a non-display region; a shift register provided in the non-display region; a gate line provided in the display region and extending along a first direction; and a gate signal output line, provided in the non-display region and having a first end and a second end. The first end of the gate signal output line is connected to the shift register, and the second end of the gate signal output line is connected to the gate line at a side of the gate line in a second direction perpendicular to the first direction.

Array substrate, display panel and display apparatus

A shift register includes an input circuit, a compensation circuit, an output circuit, a pull-down control circuit, a pull-down circuit, and a reset circuit. During operation of a pixel driving circuit, if a display abnormality occurs in one or more pixels corresponding to the shift register, a compensation signal may be provided by the compensation circuit to a pull-up node according to specific condition of the display abnormality, so as to change a voltage of the pull-up node, and further change a delay time of waveform of the signal passing the switching element in the output circuit connected to the pull-up node.

Shift register having a compensation circuit, shift register circuit and display device

A shift register unit, a driving device, a display device and a driving method are disclosed, The shift register unit includes a first circuit unit and a second circuit unit; the first circuit unit includes an input terminal, a reset terminal, a clock signal terminal, a first voltage terminal, a second voltage terminal and a first output terminal, and is configured to output a first output signal of the shift register unit from the first output terminal; the second circuit unit includes a third voltage terminal, a fourth voltage terminal and a second output terminal, and is configured to output a second output signal of the shift register unit from the second output terminal, at least under the control of the first output signal; and the second output signal and the first output signal are mutually phase-inverted signals.

Shift register unit, driving device, display device and driving method

The present disclosure provides a gate drive unit, a driving method thereof and a gate drive circuit. The gate drive unit includes a shift register and a plurality of output control modules. Each of the output control modules is connected to a corresponding clock scanning signal line and a corresponding first scanning signal output terminal, respectively. Each of the output control modules includes a first output control submodule and an output reset submodule. The first output control submodule is connected to a signal output terminal of the shift register, the corresponding clock scanning signal line and the corresponding first scanning signal output terminal, and configured to send a clock scanning signal of the corresponding clock scanning signal line to the corresponding first scanning signal output terminal, under control of a signal outputted by the signal output terminal of the shift register.

Gate drive unit and driving method thereof and gate drive circuit

A shift register, a driving method thereof and a device are provided. A shift register sub-circuit outputs a gate scanning signal, to dive gate lines. The shift register sub-circuit outputs a touch scanning signal to a touch control circuit, so that the touch control circuit conducts a touch electrode with a touch detection signal terminal in response to the touch scanning signal, and thus, touch driving may be performed. Therefore, the shift register provided by the embodiment of the disclosure is not only capable of realizing scanning driving, but also capable of realizing the touch driving of touch electrodes. In addition, the number of arranged touch detection lines may be reduced, and furthermore, the area of a Fan-out region and the area of a non-display region are reduced.

Shift register, driving method thereof and device

Embodiments of the present disclosure provide an array substrate and a manufacturing method thereof, and a display device. The array substrate has a display region and a wiring region located on a periphery of the display region. The array substrate includes a base substrate, and a transparent conductive strip and a wire formed on the base substrate in the wiring region; the transparent conductive strip and the wire are located in different layers and are in direct contact with each other, and the wire has one or more exposure holes formed therein.

Array substrate including a transparent conductive strip and a wire and manufacturing method thereof, and display device

A shift register circuit includes a first circuit, M second circuits, and N third circuits. M and N are both positive integers, N is an integer multiple of M, M is greater than or equal to 2, and a quotient of N and M is greater than or equal to 2. The first circuit includes a first signal output terminal. Each second circuit includes a second signal input terminal connected to the first signal output terminal. Each third circuit includes a third signal input terminal that is connected to one of second signal input terminals of the M second circuits. A second signal output terminal of each second circuit is connected to third signal input terminals of N/M third circuits, and different second signal output terminals are connected to different third signal input terminals.

Shift register circuit and driving method therefor, and gate drive circuit and display device

A shift register unit includes a common circuit and an output circuit. The common circuit is configured to control a potential at a pull-up node under the control of an input end, a resetting end and a first clock signal input end. The output circuit is configured to control 2M gate driving signal output ends to output gate driving signals respectively under the control of the pull-up node, a noise reduction control end and an output control end, where M is an integer greater than 1.

Shift register unit, driving method, gate driving circuit and display device

An array substrate, a method for manufacturing the same, and a display apparatus are provided. The array substrate includes multiple pixel units defined by crossed gate lines and data lines, and each unit includes a pixel electrode and a thin film transistor. The array substrate further includes repairing units corresponding to target pixel electrodes in the pixel electrodes, where each repairing unit is connected to a corresponding target pixel electrode and a corresponding target signal line, and is configured to control the target pixel electrode connected to the repairing unit to be electrically connected to or insulated from the target signal line connected to the repairing unit.

Array substrate, method for manufacturing the same and display apparatus

Growing community of inventors

Beijing, China

Zhuo Xu