Huawei Technologies Co., Limited

Zhonggui Xiang

Davide Tonietto

Euhan Chong

Dmitry Petrov

An integrated circuit is described. The integrated circuit includes a first layer, a first clock line for carrying a first clock signal, and a second clock line for carrying a second clock signal. The second clock line runs alongside the first clock line for a distance. The integrated circuit includes a shield structure for shielding the clock line from crosstalk and/or other interference. The shield structure includes a shield wall extending from the first layer. The shield wall runs between the first and second clock lines for at least a portion of the distance. The shield structure may also include a shield cage extending from the first layer and surrounding the first and second clock lines for at least a portion of the distance. The shield cage has a plurality of openings. The shield cage and/or shield wall may be connected to the ground of an AC power supply.

Shield structure for a low crosstalk single ended clock distribution circuit

A device includes a first inductor positioned on a first substrate. The first inductor has at least one turn in a plane that is perpendicular to a plane of the first substrate. The first inductor is positioned for near field coupling with a second inductor. The second inductor is positioned on a second substrate, with at least one turn that is in a plane perpendicular to a plane of the second substrate. The second inductor is substantially parallel to the first inductor. Such an arrangement may be used for near field coupling, including edge-to-edge coupling, between two integrated circuits.

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Zhonggui Xiang