Promos Technologies, Inc

Zhong Dong

Chuck Jang

Ching-Hwa Chen

Chia-Shun Hsiao

Vei-Han Chan

Chunchieh Huang

Jin-Ho Kim

Chung Wai Leung

Barbara Haselden

George Kovall

Tai-Peng Lee

Chiliang L Chen

Steven Ming Yang

Performance of field effect transistors and other channel dependent devices formed on a monocrystalline substrate is improved by carrying out a high temperature anneal in a nitrogen releasing atmosphere while the substrate is coated by a sacrificial oxide coating containing easily diffusible atoms that can form negatively charged ions and can diffuse deep into the substrate. In one embodiment, the easily diffusible atoms comprise at least 5% by atomic concentration of chlorine atoms in the sacrificial oxide coating and the nitrogen releasing atmosphere includes NO. The high temperature anneal is carried out for less than 10 hours at a temperature less than 1100&#xb0; C.

Semiconductor devices with gate electrodes and with monocrystalline silicon regions that contain atoms of nitrogen and one or more of chlorine, bromine, sulfur, fluorine, or phosphorus

Conventional fabrication of sidewall oxide around an ONO-type memory cell stack usually produces Bird's Beak because prior to the fabrication, there is an exposed sidewall of the ONO-type memory cell stack that exposes side parts of a plurality of material layers respectively composed of different materials. Certain materials in the stack such as silicon nitrides are more difficult to oxidize than other materials in the stack such polysilicon. As a result oxidation does not proceed uniformly along the multi-layered height of the sidewall. The present disclosure shows how radical-based fabrication of sidewall dielectric can help to reduce the Bird's Beak formation. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse as deeply through already oxidized layers of the sidewall such as silicon oxide layers. As a result, a more uniform sidewall dielectric can be fabricated with more uniform breakdown voltages along it height.

Method of forming ONO-type sidewall with reduced bird's beak

Method of repairing deep subsurface defects in a silicon substrate that includes diffusing negatively charged ions into the substrate from a sacrificial oxide layer

After forming a stack of layers () for a transistor or a charge-trapping memory over an active area (), and before etching isolation trenches () in the semiconductor substrate () with the stack as a mask, spacers () are formed on the stack's sidewalls. The trench etch may include a lateral component, so the top edges of the trenches may be laterally recessed to a position under the spacers or the stack. After the etch, the spacers are removed to facilitate filling the trenches with the dielectric (to eliminate voids at the recessed top edges of the trenches). Other embodiments are also provided.

Fabrication of integrated circuits with isolation trenches

In a nonvolatile memory cell with charge trapping dielectric (), the tunnel dielectric () includes chlorine adjacent to the charge trapping dielectric but no chlorine (or less chlorine) adjacent to the cell's channel region (). The chlorine adjacent to the charge trapping dielectric serves to improve the programming and/or erase speed. The low chlorine concentration adjacent to the channel region prevents chlorine from degrading the data retention. Other features are also provided.

Nonvolatile memories with tunnel dielectric with chlorine

In-situ steam generation (ISSG) is used to reduce the nitrogen concentration in silicon and silicon oxide areas.

Reducing nitrogen concentration with in-situ steam generation

A method and apparatus are disclosed for reducing the concentration of chlorine and/or other bound contaminants within a semiconductor oxide composition that is formed by chemical vapor deposition (CVD) using a semiconductor-element-providing reactant such as dichlorosilane (DCS) and an oxygen-providing reactant such as NO. In one embodiment, a DCS-HTO film is annealed by heating NO gas to a temperature in the range of about 825&#xb0; C. to about 950&#xb0; C. so as to trigger exothermic decomposition of the NO gas and flowing the heated gas across the DCS-HTO film so that disassociated atomic oxygen radicals within the heated NO gas can transfer disassociating energy to chlorine atoms bound within the DCS-HTO film and so that the atomic oxygen radicals can fill oxygen vacancies within the semiconductor-oxide matrix of DCS-HTO film. An improved ONO structure may be formed with the annealed DCS-HTO film for use in floating gate or other memory applications.

Methods for improving quality of high temperature oxide (HTO) formed from halogen-containing precursor and products thereof and apparatus therefor

Conventional fabrication of top oxide in an ONO-type memory cell stack usually produces Bird's Beak. Certain materials in the stack such as silicon nitrides are relatively difficult to oxidize. As a result oxidation does not proceed uniformly along the multi-layered height of the ONO-type stack. The present disclosure shows how radical-based fabrication of top-oxide of an ONO stack (i.e. by ISSG method) can help to reduce formation of Bird's Beak. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse deeply through already oxidized layers of the ONO stack such as the lower silicon oxide layer. As a result, a more uniform top oxide dielectric can be fabricated with more uniform breakdown voltages along its height. Additionally, adjacent low and high voltage transistors may benefit from simultaneous formation of their gate dielectrics with use of the radical-based oxidizing method.

Method for simultaneously fabricating ONO-type memory cell, and gate dielectrics for associated high voltage write transistors and gate dielectrics for low voltage logic transistors by using ISSG

Chlorine is incorporated into pad oxide () formed on a silicon substrate () before the etch of substrate isolation trenches (). The chlorine enhances the rounding of the top corners (C) of the trenches when a silicon oxide liner () is thermally grown on the trench surfaces. A second silicon oxide liner () incorporating chlorine is deposited by CVD over the first liner (), and then a third liner () is thermally grown. The chlorine concentration in the second liner () and the thickness of the three liners () are controlled to improve the corner rounding without consuming too much of the active areas ().

Use of chlorine to fabricate trench dielectric in integrated circuits

An ONO-type inter-poly insulator is formed by depositing intrinsic silicon on an oxidation stop layer. In one embodiment, the oxidation stop layer is a nitridated top surface of a lower, and conductively-doped, polysilicon layer. In one embodiment, atomic layer deposition (ALD) is used to precisely control the thickness of the deposited, intrinsic silicon. Heat and an oxidizing atmosphere are used to convert the deposited, intrinsic silicon into thermally-grown, silicon dioxide. The oxidation stop layer impedes deeper oxidation. A silicon nitride layer and an additional silicon oxide layer are further deposited to complete the ONO structure before an upper, and conductively-doped, polysilicon layer is formed. In one embodiment, the lower and upper polysilicon layers are patterned to respectively define a floating gate (FG) and a control gate (CG) of an electrically re-programmable memory cell. In an alternative embodiment, after the middle, silicon nitride of the ONO structure is defined, another layer of intrinsic silicon is deposited, by way of for example, ALD. Heat and an oxidizing atmosphere are used to convert the second deposited, intrinsic silicon into thermally-grown, silicon dioxide. An ONO structure with two thermally-grown, and spaced apart, silicon oxide layers is thereby provided.

Precision creation of inter-gates insulator

Aluminum oxide is deposited by atomic layer deposition to form a high-k dielectric for the interpoly dielectric layer of a non-volatile memory device. The increased capacitive coupling can allow a thicker oxide layer to be used between the floating gate and the control gate, resulting in improved reliability and longer lifetime of the memory cells fabricated according to this invention.

Atomic layer deposition of interpoly oxides in a non-volatile memory device

Methods for improving quality of semiconductor oxide composition formed from halogen-containing precursor

The floating gate, or the oxide between the floating and control gates, or both are nitrided before the control gate layer is deposited.

Floating gate nitridation

A thin buffer layer of SiON is formed on the top surface of the floating gate, in order to protect the polysilicon surface from attack by atomic chlorine produced during the formation of the high temperature oxide of the ONO stack. The buffer layer can also be formed on other dielectric surfaces which are otherwise subject to adverse conditions in subsequent processing, such as the nitride layer in the ONO dielectric stack.

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San Jose, CA, United States of America

Zhong Dong