Chinese Academy of Sciences

Southern University of Science and Technology

Silicon Storage Technology, Inc.

Shanghai Xinanna Electronic Technology Co., Ltd.

Semiconductor Manufacturing International (beijing) Corporation

Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Scienc

Zhitang Song

Feng Rao

Bo Tong Liu

Songlin Feng

Sannian Song

Guobiao Zhang

Guanping Wu

Liangcai Wu

Houpeng Chen

Bomy A Chen

Min Zhu

Chao B Zhang

Ting Ting Zhang

Ya-Fen Lin

Xi Li

Cheng Peng

Hongyu Yu

Yu Lei

Xudong Wan

Xilin Zhou

Kun Ren

Weili Liu

Yuefeng Gong

Zuoya Yang

Zhifeng Xie

Bo Liu

Chao Zhang

Yong Wang

Qian Wang

Wanchun Ren

Bangming Chen

Keyuan Ding

Daolin Cai

Yongxia Wang

Weilei Wang

Xiaogang Chen

Tianqi Guo

Yong Kang

A cross-point memory includes a plurality of memory devices, with each device comprising a memory layer between first and second address lines. In one preferred embodiment, the memory layer comprises an OTS (Ovonic Threshold Switch) film and an antifuse film. In another preferred embodiment, the memory layer comprises an OTS film having a first switch voltage (i.e. forming voltage V) greater than all subsequent switch voltages (i.e. threshold voltage V). The cross-point memory is preferably a three-dimensional one-time-programmable memory (3D-OTP), including horizontal 3D-OTP and vertical 3D-OTP.

Memory device

The present invention discloses an ESD protection circuit comprising resistor vias. It comprises a plurality of ESD devices connected in parallel, with each ESD device comprising a resistor and a two-terminal switch (e.g. an OTS component) connected in series. The resistor is formed in a resistor via disposed vertically with the two-terminal switch and filled with at least a conductive material with high resistivity.

Electrostatic discharge (ESD) protection circuits

The present disclosure provides a phase change memory and a method for making the same. The phase change memory includes a substrate, a plurality of phase change memory cells, and an isolation material layer. The plurality of phase change memory cells are separately disposed on the substrate, the phase change memory cell sequentially includes, from bottom to top, a first electrode material layer, a first transition material layer, an ovonic threshold switching (OTS) material layer, a second transition material layer, a second electrode material layer, a third transition material layer, a phase change material layer, a fourth transition material layer, and a third electrode material layer; The isolation material layer is disposed on the substrate and surrounds side surfaces of the phase change memory cell, and the plurality of phase change memory cells are isolated from each other by isolation material layer.

Phase change memory and method for making the same

The present invention discloses parallel, series and hybrid ESD protection circuits. A preferred parallel ESD protection circuit comprises a plurality of ESD devices connected in parallel, with each comprising a resistor and an OTS component connected in series. A preferred series ESD protection circuit comprises a plurality of ESD devices connected in series, wherein the OTS components in all ESD devices are disposed on a same level. A preferred hybrid ESD protections circuit comprises ESD devices connected in parallel, as well as in series.

A read-out circuit and a read-out method for a three-dimensional memory, comprises a read reference circuit and a sensitive amplifier, the read reference circuit produces read reference current capable of quickly distinguishing reading low-resistance state unit current and reading high-resistance state unit current. The read reference circuit comprises a reference unit, a bit line matching module, a word line matching module and a transmission gate parasitic parameter matching module. With respect to the parasitic effect and electric leakage of the three-dimensional memory in the plane and vertical directions, the present invention introduces the matching of bit line parasite parameters, leakage current and transmission gate parasitic parameters into the read reference current, and introduces the matching of parasitic parameters of current mirror into the read current, thereby eliminating the phenomenon of pseudo reading and reducing the read-out time.

Read-out circuit and read-out method for three-dimensional memory

A read circuit of storage class memory comprises: an array; a read reference circuit, having the same bit line parasitic parameters as the array, having the same read transmission gate parasitic parameters as the array, used to generate a read reference current; a sense amplifier, providing the same current mirror parasitic parameters as the reference side, used to generate a read current from a selected memory cell, compare the said read current with the said read reference current and output a readout result. In the present invention, the said read current and the said read reference current are generated at the same time, the transient curve of the said read reference current is between the low resistance state read current and the high resistance state read current from an early stage. The present invention largely reduces the read access time, has a good process variation tolerance, has a wide application, and is easy to be used in the practical product.

Read circuit of storage class memory with a read reference circuit, having same bit line parasitic parameters and same read transmission gate parasitic parameters as memory

The present disclosure relates to the field of preparing an inorganic nanometer material and application thereof, and specifically relates to a film-forming silica sol, a method of preparing the silica sol, and usage thereof. The present disclosure provides a film-forming silica sol comprising, by weight percentage, constituents of: silica sol: 66-91%; modifying agent: 0.1-1.8%; film-forming auxiliary: 7.2-33.9%. The present disclosure further provides a method of preparing a film-forming silica sol and an application thereof. With the film-forming silica sol, a method of preparing the silica sol, and usage thereof according to the present disclosure, the prepared film-forming silica sol has a good appearance transparency and stability, and when applied to paint as a film-forming coating, it has a good glossiness, a high hardness, and a strong adhesive force; therefore, it has a high practical value in the paint field.

Film-forming silica sol, method of preparing the same, and application of the same

A storage array and a storage chip and method for storing a logic relationship between objects. The storage array comprises first leading-out wires and second leading-out wires, and a storage unit is connected between each first leading-out wire and each second leading-out wire having different serial numbers. A controllable switch is connected between each first leading-out wire and each second leading-out wire having a same serial number. The storage chip comprises an interface module. A control module is used for producing a control signal. A driving module is used for producing write current, erase current or read current. A first decoder and a second decoder are used for gating the first leading-out wires and the second leading-out wires. A storage array is used for storing a logic relationship value. The storage method comprises write and read operations.

Storage array, and storage chip and method for storing logical relationship of objects

A phase change material for a phase change memory and a preparing method thereof. The phase change material for a phase change memory has a chemical formula of ScGeSbTe, wherein 0&#x2264;x&#x2264;60, 0&#x2264;y&#x2264;90, 0&#x3c;z&#x2264;65, 0&#x3c;100-x-y-z&#x3c;100. The phase change material for a phase change memory according to the present invention is capable of repeatedly changing phases. The ScGeSbTehas two different resistance value states, i.e., a high resistance state and a low resistance state, and a reversible transformation between the high resistance state and the low resistance state can be achieved by being applied a pulse electrical signal thereto, which satisfies basic requirements of a storage material for the phase change memory.

Phase change material for phase change memory and preparation method therefor

An Sb&#x2014;Te&#x2014;Ti phase-change thin-film material applicable to a phase-change memory and preparation thereof. The Sb&#x2014;Te&#x2014;Ti phase-change memory material is formed by doping an Sb&#x2014;Te phase-change material with Ti, Ti forms bonds with both Sb and Te, and the Sb&#x2014;Te&#x2014;Ti phase-change memory material has a chemical formula SbTeTi, where 0&#x3c;x&#x3c;80 and 0&#x3c;y&#x3c;100&#x2212;x. When the Sb&#x2014;Te&#x2014;Ti phase-change memory material is a Ti&#x2014;SbTephase-change memory material, Ti atoms replace Sb atoms, and phase separation does not occur. The crystallization temperature of the Sb&#x2014;Te&#x2014;Ti phase-change memory material is significantly risen, retention is improved, and thermal stability is enhanced; meanwhile, the amorphous state resistance decreases, and the crystalline state resistance increases; and the Sb&#x2014;Te&#x2014;Ti phase-change memory material has wide application in phase-change memories.

Sb&#x2014;Te&#x2014;Ti phase-change memory material and Ti&#x2014;Sb2Te3 phase-change memory material

The present disclosure provides a method for preparing an aluminum oxide polishing solution. The methods include: 1) mixing a silane coupling agent, ethyl alcohol, and water to form a hydrolysate; 2) under a condition of heating and stirring at a temperature between 95&#xb0; C. and 110&#xb0; C., adding the hydrolysate into aluminum oxide powder; keeping stirring while heating till liquid is completely volatilized, thereby obtaining a modified aluminum oxide; 3) grinding the modified aluminum oxide into powder and dispersing the powder into water; adjusting solution pH to 9.5-10.5, thereby obtaining the aluminum oxide polishing solution. It may achieve a polishing efficiency of pH=13.00 by using the aluminum oxide polishing solution of the present disclosure; meanwhile, less scratches will occur to a polishing disc.

Method for preparing an aluminum oxide polishing solution

The present invention provides a phase-change storage unit for replacing DRAM and FLASH and a manufacturing method thereof, and the phase-change storage unit includes a phase-change material layer and a cylindrical lower electrode being in contact with and located below the phase-change material layer, where the phase-change material layer is formed by connecting a side wall layer and a round bottom layer, forms a hollow cylinder or hollow inverted conical frustum having an opening at an upper part, and the hollow cylinder or hollow inverted conical frustum is internally filled with a medium layer. The present invention adopts the means of preparing a phase-change material layer with a vertical side wall layer and a phase-change material layer with a slant side wall layer, in which a medium material is filled, and adopts the means of a small electrode, so as to reduce the thickness of the phase-change material layer, thereby reducing the phase-change region during the operation, improving the heat stability and the phase-change speed of the phase-change material layer, and finally achieving purposes of reducing the operating power consumption, improving the device data holding capability, increasing the operating speed of the device, and increasing the number of times of cyclic operating of the device.

Phase-change storage unit for replacing DRAM and FLASH and manufacturing method thereof

An epitaxial growth method for preventing auto-doping effect is presented. This method starts with the removal of impurities from the semiconductor substrate and the reaction chamber to be used. Then the semiconductor substrate is loaded in the cleaned reaction chamber to be pre-baked under vacuum conditions before the extraction of the dopant atoms desorbed from the surface of the semiconductor substrate. Next, under high temperature and low gas flow conditions, a first intrinsic epitaxial layer is formed on the surface of said semiconductor substrate. Following this, under low temperature and high gas flow conditions, a second epitaxial layer of required thickness is formed on the structural surface of the grown intrinsic epitaxial layer. Last, silicon wafer is unloaded after cooling. This method can prevent auto-doping effect during the epitaxial growth on semiconductor substrate and thus ensure the performance and enhance the reliability of the devices in peripheral circuit region.

Method of preventing auto-doping during epitaxial layer growth by cleaning the reaction chamber with hydrogen chloride

The present invention provides a phase-change storage unit containing a TiSiN material layer and a method for preparing the same. The phase-change storage unit includes a phase-change material layer and a lower electrode located there below, the phase-change material layer and the lower electrode are connected by a TiSiN material layer, the lower electrode includes a bottom and a sheet side connected to the bottom, the sheet side is perpendicular to the bottom to form a blade structure, and the top of the sheet side contacts the TiSiN material layer. The present invention adopts annealing to increase the grain size of the electrode so as to reduce the overall resistance of the device and form a TiSiN material layer on the top of the lower electrode so as to reduce the effective operation region. The phase-change storage unit of the present invention is applied to a phase-change memory to achieve the advantages such as low power consumption, high density and high data retention performance.

Phase-change storage unit containing TiSiN material layer and method for preparing the same

A data readout circuit of phase change memory, relating to one or more phase change memory cells, wherein each phase change memory cell is connected to the control circuit by bit line and word line; said data readout circuit comprises: a clamp voltage generating circuit, used to generate a clamp voltage; a precharge circuit, used to fast charge bit line under the control of a clamp voltage; a clamped current generating circuit, used to generate a clamped current to keep bit line at clamped state under the control of a clamp voltage; a clamped current operation circuit, used to perform subtraction and multiplication on clamped current to increase the difference of clamped current between high resistance state and low resistance state; a sense amplifier circuit, used to compare the operated clamped current and the reference current and output the readout result. Compared with the prior art, the data readout circuit of phase change memory provided by the present invention can effectively enhance the data readout speed, decrease the misreading window between high resistance state and low resistance state, reduce the crosstalk of data readout, and improve the reliability of data readout.

Growing community of inventors

Shanghai, China

Zhitang Song