Lion Semiconductor Inc.

Western Digital (fremont), Inc.

Zhipeng Li

Thomas Li

Hans Meyvaert

Alberto Alessandro Angelo Puggelli

John Crossley

Bertram J Rodgers

Qunwen Leng

Wonyoung Kim

Jianxin Fang

Alberto Puggelli

Fred Chen

Haiwen Xi

Yuankai Zheng

Shaoping Li

Ming Mao

Gerardo Bertero

Christian Kaiser

Tong Zhao

Zhitao Diao

Steven C Rudy

Christopher L Beaudry

Shihai He

Zhihong Zhang

Xin Jiang

Haifeng Wang

Minbok Lee

Aaron Melgar

Yingbo Zhang

Ruisheng Liu

Circuits comprising: a capacitor; switches that, when State0, couple the capacitor in parallel with the load and, when State1, couple the capacitor in series with the load, wherein a first of the switches connects the capacitor to ground when in State0 and wherein a second of the switches connects the capacitor to an input voltage when in State1; a third switch, wherein a first side of the third switch is connected to the capacitor identically to one of the first switch and the second switch (OFWSW), wherein the third switch switches identically to the OFWSW, wherein the third switch is smaller than the OFWSW; a first resistor connected to the second side of the third switch; and a hardware processor that measures a current flowing through the first resistor and estimates the current provided to the load based on the current measured as flowing through the first resistor.

Circuits and methods for measuring the output current of a switched capacitor regulator

Circuits for a voltage regulator are provided, comprising: an inductor having a first side coupled to an input voltage; a first flying capacitor; a second flying capacitor; and a plurality of switches, wherein: in a first state, the plurality of switches couple: a second side of the inductor to a second side of the first flying capacitor and an output node; a first side of the first flying capacitor to a first side of the second flying capacitor; and a second side of the second flying capacitor to a voltage supply, in a second state, the plurality of switches couple: the second side of the inductor to the first side of the second flying capacitor; the second side of the second flying capacitor to the output node and the first side of the first flying capacitor; and the second side of the first flying capacitor to the voltage supply.

Circuits and methods for hybrid 3:1 voltage regulators

A switching capacitor regulator, comprising: a switching capacitor configured to switch between a first state and a second state, wherein, in the first state, a first node of the switching capacitor is coupled to a second terminal, and a second node of the switching capacitor is coupled to a fixed voltage level, and wherein, in the second state, the first node is coupled to a first terminal, and the second node is coupled to the second terminal; a power switch configured to couple the second node to the second terminal when the switching capacitor is in the second state; and a flying inverter configured to control the power switch, wherein the flying inverter has a positive power terminal and a negative power terminal, wherein the positive power terminal is coupled to the first node, and wherein the negative power terminal is coupled to the second node.

Switched capacitor regulators with flying-inverter-controlled power switches

Circuits comprising: a first capacitor(C1); a first switch(S1) having a first side coupled to a VIN and a second side coupled to a first side of C1; a second switch(S2) having a first side coupled to the second side of S1; a third switch(S3) having a first side coupled to a second side of S2 and a second side coupled to a second side of C1; a fourth switch(S4) having a first side coupled to a second side of S3 and a second side coupled to a V, wherein: in a first state, S1 and S3 are off, and S2 and S4 are on; in a second state, S1 and S3 are on, and S2 and S4 are off; and at least one of a control of S1, a control of S2, a control of S3, and a control of S4 is coupled to a time-varying-slew-rate signal.

Circuits and methods for slew rate control of switched capacitor regulators

Voltage regulator systems include, in part, a regulator comprising an input terminal and an output terminal, wherein the regulator is configured to receive an input voltage from an adapter at the input terminal and provide an output voltage at the output terminal, wherein the regulator comprises at least one switched capacitor regulator operating in a first conversion mode corresponding to a first conversion factor. The voltage regulator systems also include a controller configured to control an operation of the regulator, wherein the controller is configured to determine when a conversion ratio of the regulator is greater than the first conversion factor, and, in response, to send a request to the adapter to decrease the input voltage.

Voltage regulator systems configured to control input voltage

An inductor; a first switch having a first side connected to a first voltage source (VS); a second switch having a first side connected to a second side of the first switch (SS), and a second side connected to a first side of the inductor (SI); a third switch having a first side connected to theSI; a fourth switch having a first side connected to a second side of the third switch (SS), and a second side connected to a second voltage source (VS); a fifth switch having a first side connected to theSI, and a second side connected to the VSand/or the VS; a first capacitor having a first side connected to theSS, and a second side connected to theSS; and a second capacitor having a first side connected to a second side of the inductor, and a second side connected to the VS

Circuits for three-level buck regulators

A voltage regulator system, comprising: a switched capacitor (SC) regulator that operates at a switching frequency and receives an input voltage; and a controller configured to control an operation of the SC regulator by adjusting the switching frequency of the SC regulator based on efficiency. In some embodiments, the switching frequency is swept to determine a best efficiency. In some embodiments, the switching frequency is swept at each of a plurality of values for the input voltage. In some embodiments, the system includes further one or more switches in series with the SC regulator. In some embodiments, the SC regulator includes an output terminal that is coupled to a battery.

Feedback control for efficient high-speed battery charging

A magnetic read apparatus has a media-facing surface (MFS) and includes a read sensor, a magnetic bias structure and an insulating layer. The read sensor has a side, a front occupying part of the MFS and a back. The read sensor includes a free layer, a pinned layer and a barrier layer between the free and pinned layers. The barrier layer has a barrier layer coefficient of thermal expansion. The magnetic bias structure is adjacent to the side of the free layer. The insulating layer includes first and second portions. The first portion of the insulating layer is between the read sensor side and the magnetic bias structure. The second portion of the insulating layer adjoins the read sensor back. The insulating layer has an insulating layer coefficient of thermal expansion that is at least &#x2153; of and not more than 5/3 of the barrier layer coefficient of thermal expansion.

Read sensor having an insulating layer capable of use in two-dimensional magnetic recording

A magnetic read apparatus has an air-bearing surface (ABS) and includes a shield, a crystal decoupling structure on the shield and a read sensor on the crystal decoupling structure. The crystal decoupling structure includes at least one of a magnetic high crystalline temperature amorphous alloy layer and a combination of a high crystalline temperature amorphous layer and an amorphous magnetic layer. The high crystalline temperature amorphous layer has a crystalline temperature of at least three hundred degrees Celsius. The amorphous magnetic layer is amorphous as-deposited.

Magnetic reader having a crystal decoupling structure

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Fremont, CA, United States of America

Zhipeng Li