Mediatek Singapore Pte. Ltd.

Mediatek Corporation

Zhiming Deng

Jing-Hong Conan Zhan

Chun-Hsien Peng

Ti-Ku Yu

Chuan-Kang Liang

Li Gao

Osama Khalil Shanaa

Osama Shanaa

An electronic device and a method for reducing power consumption of signal transmission in the electronic device are provided. The electronic device may include a source circuit, a destination circuit, at least one transmission wire and at least one resonance wire, wherein the at least one transmission wire is coupled between at least one output terminal of the source circuit and at least one input terminal of the destination circuit, and the at least one resonance wire is coupled to the at least one input terminal of the destination circuit and is routed along the at least one transmission wire. In specific, the source circuit is configured to output an oscillation signal having an oscillation frequency, the destination circuit is configured to receive the oscillation signal, wherein the at least one transmission wire is configured to transmit the oscillation signal from the source circuit to the destination circuit.

Electronic device and method for reducing power consumption of signal transmission in electronic device

Some embodiments relate to a device, comprising an amplifier and a linearizer, the linearizer comprising a first transistor, the first transistor comprising a first terminal coupled to an input of the amplifier, a second terminal configured to be coupled to a DC supply voltage, and a control terminal configured to control a current flowing between the first and second terminals and configured to receive a DC bias voltage different from a voltage of the first terminal. Some embodiments relate to a device, comprising an amplifier, comprising an input, an output, and a first set of one or more transistors coupled between the input and the output, and a linearizer, comprising a second set of one or more transistors coupled between a DC supply voltage and the input of the amplifier, wherein the first set of transistors and the second set of transistors have a same topology.

Amplifier linearization and related apparatus thereof

A power amplifier cell includes a first input arranged to receive an in-phase control signal, a second input arranged to receive a quadrature control signal, an input stage arranged to output a drive signal based at least partly on the received in-phase and quadrature control signals, and an output stage arranged to receive at an input thereof the drive signal output by the input stage, and to generate an output signal for the power amplifier cell in response to the received drive signal.

PA cell, PA module, wireless communication unit, RF transmitter architecture and method therefor

A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first transceiving path between one of the plurality of transceiving elements and the signal processing block and a second transceiving path between another of the plurality of transceiving elements and the signal processing block share at least partial signal traces of the first distributed network.

Phase-arrayed transceiver

A phase-arrayed device includes: a signal processing circuit arranged to generate a specific signal; a first phase-arrayed channel arranged to provide a first phase-arrayed signal according to the specific signal; a first conducting path arranged to conduct the specific signal to the first phase-arrayed channel; a second conducting path arranged to conduct the first phase-arrayed signal to the signal processing circuit; and a detecting circuit, arranged to detect a mismatch between the first phase-arrayed signal and a reference signal to generate a detecting signal utilized for calibrating the first phase-arrayed signal.

Phase-arrayed device and method for calibrating the phase-arrayed device

An apparatus for performing power detection includes a squarer module and a calibration module that is coupled to the squarer module, where the squarer module includes a first squarer and a second squarer. The first squarer is arranged to convert an input signal of the squarer module into a first squarer output signal. In addition, the second squarer is arranged to output a second squarer output signal while a predetermined voltage level is input into an input terminal of the second squarer. Additionally, the calibration module is arranged to compare a difference between the first squarer output signal and the second squarer output signal with a reference signal to generate a comparison signal, and to compensate the difference according to the comparison signal, so as to perform a calibration on the apparatus. A method for performing power detection is also provided, and can be performed by utilizing the apparatus.

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San Jose, CA, United States of America

Zhiming Deng