Applied Materials, Inc.

Zhijun Jiang

Ganesh Balasubramanian

Xinhai Han

Amit Kumar Bansal

Juan Carlos Rocha-Alvarez

Bok Hoen Kim

Masaki Ogata

Todd J Egan

Jianhua Zhou

Thomas E Nowak

Jian J Chen

Ramprakash Sankarakrishnan

Mohamad A Ayoub

Edward W Budiarto

Nagarajan Rajagopalan

Terrance Y Lee

Michael Wenyoung Tsiang

Jeongmin Lee

Patrick Reilly

Heung Lak Park

Shahid Shaikh

Sergey Starik

Dmitriy Panasyuk

Deenesh Padhi

Allison Yau

Zeqiong Zhao

Akhil Singhal

Sang-Jin Kim

Yue Chen

Daemian Raj Benjamin Raj

Shailendra Srivastava

Kaushik Comandoor Alayavalli

Qiang Ma

Jennifer Y Sun

Sanjeev Baluja

Kang Sub Yim

Prashant Kumar Kulshreshtha

Lin Zhang

Praket Prakash Jha

Diwakar N Kedlaya

Kalyanjit Ghosh

Tejas Ulavi

Shuran Sheng

Mayur G Kulkarni

Hemant P Mungekar

Nitin Khurana

Fang Ruan

Nikhil Sudhindrarao Jorapur

Hidehiro Kojiri

Joseph C Werner

Yuxing Zhang

Sai Susmita Addepalli

Ndanka O Mukuti

Shawyon Jafari

Vu Ngoc Tran Nguyen

Yusheng Zhou

Arkajit Roy Barman

Chuan Ying Wang

Abhigyan Keshri

Thuy Britcher

Priyanka Dash

Allen Ko

Daniel Hwung

Jang Seok Oh

Jiyong Huang

Miguel S Fung

Thian Choi Lim

William Pryor

Vivien Chua

Jose Angelo Olave

Semiconductor processing systems and method are described that may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber, where the substrate processing region includes an electrostatic chuck. The methods may further include depositing a seasoning layer on the electrostatic chuck from the deposition precursors to form a seasoned electrostatic chuck. The seasoning layer may be characterized by a dielectric constant greater than or about 3.5. The methods may still further include applying a voltage to the seasoned electrostatic chuck of greater than or about 500 V. The seasoned electrostatic chuck may be characterized by a leakage current of less than or about 25 mA when the voltage is applied.

Systems and methods of seasoning electrostatic chucks with dielectric seasoning films

Exemplary deposition methods may include delivering a silicon-containing precursor and an inert gas to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the inert gas. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The processing region may be maintained free of helium delivery during the deposition method.

Helium-free silicon formation

Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate. The processing methods may further include etching an opening through the first semiconductor layer, where the opening has a height and a width, and where the opening is characterized by a variation in the width between a midpoint of the height of the opening and an endpoint of the opening that is less than or about 5 Å.

Profile shaping for control gate recesses

Exemplary semiconductor processing systems may include a processing chamber including a lid stack having an output manifold. The systems may include a gas panel. The systems may include an input manifold. The input manifold may fluidly couple the gas panel with the output manifold of the processing chamber. A delivery line may extend from the input manifold to the output manifold. The systems may include a first transmission line extending from a first set of precursor sources of the gas panel to the delivery line. The systems may include a second transmission line extending from a second set of precursor sources of the gas panel to the delivery line. The second transmission line may be switchably coupled between the delivery line and an exhaust of the semiconductor processing system.

Switchable delivery for semiconductor processing system

A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.

PECVD process

Examples disclosed herein relate to a method and apparatus for cleaning and repairing a substrate support having a heater disposed therein. A method includes (a) cleaning a surface of a substrate support having a bulk layer, the substrate support is disposed in a processing environment configured to process substrates. The cleaning process includes forming a plasma at a high temperature from a cleaning gas mixture having a fluorine containing gas and oxygen. The method includes (b) removing oxygen radicals from the processing environment with a treatment plasma formed from a treatment gas mixture. The treatment gas mixture includes the fluorine containing gas. The method further includes (c) repairing an interface of the substrate support and the bulk layer with a post-treatment plasma. The post-treatment plasma is formed from a post-treatment gas mixture including a nitrogen containing gas. The high temperature is greater than or equal to about 500 degrees Celsius.

High-temperature chamber and chamber component cleaning and maintenance method and apparatus

Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate. The processing methods may further include etching an opening through the first semiconductor layer, where the opening has a height and a width, and where the opening is characterized by a variation in the width between a midpoint of the height of the opening and an endpoint of the opening that is less than or about 5 &#x212b;.

Exemplary methods of semiconductor processing may include forming a plasma of a fluorine-containing precursor. The methods may include performing a chamber clean in a processing region of a semiconductor processing chamber. The processing region may be at least partially defined between a faceplate and a substrate support. The methods may include generating aluminum fluoride during the chamber clean. The methods may include contacting surfaces within the processing region with a carbon-containing precursor. The methods may include volatilizing aluminum fluoride from the surfaces of the processing region.

Processing systems and methods to control process drift

A method of forming a film stack with reduced defects is provided and includes positioning a substrate on a substrate support within a processing chamber and sequentially depositing polysilicon layers and silicon oxide layers to produce the film stack on the substrate. The method also includes supplying a current of greater than 5 ampere (A) to a plasma profile modulator while generating a deposition plasma within the processing chamber, exposing the substrate to the deposition plasma while depositing the polysilicon layers and the silicon oxide layers, and maintaining the processing chamber at a pressure of greater than 2 Torr to about 100 Torr while depositing the polysilicon layers and the silicon oxide layers.

Method of forming film stacks with reduced defects

Implementations of the present disclosure generally relate to methods for cleaning processing chambers. More specifically, implementations described herein relate to methods for determining processing chamber cleaning endpoints. In some implementations, a 'virtual sensor' for detecting a cleaning endpoint is provided. The 'virtual sensor' is based on monitoring trends of chamber foreline pressure during cleaning of the chamber, which involves converting solid deposited films on the chamber parts into gaseous byproducts by reaction with etchants like fluorine plasma for example. Validity of the &#x201c;virtual sensor&#x201d; has been confirmed by comparing the &#x201c;virtual sensor&#x201d; response with infrared-based optical measurements. In another implementation, methods of accounting for foreline pressure differences due to facility design and foreline clogging over time.

Virtual sensor for chamber cleaning endpoint

Systems and methods for depositing a film in a PECVD chamber while reducing residue buildup in the chamber. In some embodiments disclosed herein, a processing chamber includes a chamber body, a substrate support, a showerhead, and one or more heaters configured to heat the showerhead. In some embodiments, the processing chamber includes a controller.

System and method for substrate processing chambers

Embodiments described herein generally relate to methods of manufacturing an oxide/polysilicon (OP) stack of a 3D memory cell for memory devices, such as NAND devices. The methods generally include treatment of the oxide and/or polysilicon materials with precursors during PECVD processes to lower the dielectric constant of the oxide and reduce the resistivity of the polysilicon. In one embodiment, the oxide material is treated with octamethylcyclotetrasiloxane (OMCTS) precursor. In another embodiment, germane (GeH) is introduced to a PECVD process to form SiGefilms with dopant. In yet another embodiment, a plasma treatment process is used to nitridate the interface between layers of the OP stack. The precursors and plasma treatment may be used alone or in any combination to produce OP stacks with low dielectric constant oxide and low resistivity polysilicon.

Low dielectric constant oxide and low resistance OP stack for 3D NAND application

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Sunnyvale, CA, United States of America

Zhijun Jiang