Lattice Semiconductor Corporation

Zhi Wu

Kai Zhou

Yu Shen

Kexin Luo

Kai Lei

Qiming Wu

Xiaofeng Wang

Yibin Fu

Min-Kyu Kim

Gijung Ahn

Inyeol Lee

Fei Song

Fangqing Chu

Shengguo Cao

Lingfen Yue

Fangquing Chu

A voltage controlled oscillator (VCO) is disclosed. The VCO includes an amplifier that receives a control signal and a feedback signal and generates an amplified output signal based on the difference between the control signal and the feedback signal. The VCO also includes circuitry to generate an oscillating output signal based on the amplifier output signal. Additionally, the VCO includes a feedback amplifier that generates the feedback signal based on the output of the amplifier. The feedback amplifier includes a first resistor connected in parallel with a second resistor, the second resistor having an adjustable resistance.

Spectrum shaping voltage to current converter

Systems, devices and methods for analog echo cancellation for high speed full duplex data transmissions, which include a first set of differential nodes to receive reception data and transmission data, a second set of differential nodes to receive the transmission data, and a subtraction circuit to receive data from the first set of differential nodes and data from the second set of differential nodes. The subtraction circuit includes a plurality of capacitors to receive data from each of the first and second sets differential nodes, and a termination circuit for providing DC termination voltage to subtract the data of the second set of differential nodes from the data of the first set of differential nodes to eliminate echo from the reception data received at the first set differential nodes.

Echo cancellation for high speed full duplex data transmissions

Embodiments describe techniques for utilizing fractional-N phase locked loops (PLL). Some embodiments describe a fractional-divider based fractional-N PLL for a spread spectrum clock (SSC) generator that utilizes phase average techniques to suppress phase interpolator nonlinearity. Some embodiments describe a fractional-N PLL based on fractional dividers with hybrid finite impulse response (FIR) filtering. Some embodiments describe a small size and low power divider for a hybrid FIR fractional-N PLL.

Techniques for fractional-N phase locked loops

Embodiments of the invention are generally directed to a linear regulator with improved power supply ripple rejection. An embodiment of an apparatus includes an linear regulator to receive a system power supply and to generate a regulated power supply; a first voltage reference generator to generate a first voltage reference for the linear regulator; a second voltage reference generator to generate a second voltage reference for the linear regulator; and a voltage reference and power switcher. In some embodiments, the voltage reference and power switcher is to switch a voltage reference for the linear regulator from the first voltage reference to the second voltage reference and is to switch a part of a power supply for the linear regulator from the system power supply to the regulated power supply.

Linear regulator with improved power supply ripple rejection

Growing community of inventors

Shanghai, China

Zhi Wu