Intel Corporation

Zhi Wang

Yan Zhao

Weinan Li

Wei Zhang

Ankur N Shah

Kun Tian

David J Cowperthwaite

Yaozu Dong

Zhiyuan Lv

Zhenyu Wang

Kalyan Kondapally

Chuanxiao Dong

Jonathan Bloomfield

An apparatus and method for scheduling workloads across virtualized graphics processors. For example, one embodiment of a graphics processing apparatus comprises first graphics processing resources to process graphics commands and execute graphics data; workload scheduling circuitry to schedule workloads for execution on the first graphics processing resources; and workload queuing circuitry to implement a local queue to store local workload entries, each local workload entry associated with a locally-submitted workload and an external workload queue to store external workload entries, each external workload entry associated with an externally-submitted workload submitted for execution by an external graphics processing apparatus, in one embodiment, the workload scheduling circuitry schedules the locally-submitted workloads identified in the local queue and externally-submitted workloads identified in the external workload queue for processing by specified portions of the first graphics processing resources.

Apparatus and method for scheduling graphics processing resources

Apparatus and method for implementing a virtual display. For example, one embodiment of a graphics processing apparatus comprises at least one configuration register to store framebuffer descriptor information for a first guest running on a first virtual machine (VM) in a virtualized execution environment of a host processor, the framebuffer descriptor information to indicate one or more display pipes assigned to the first guest; and execution circuitry to execute a first driver assigned to the first guest, the first guest to use the first driver to display a framebuffer in a plane associated with one of the display pipes in accordance with the framebuffer descriptor information.

Apparatus and method for a virtualized display

Systems, apparatuses and methods may provide for technology that sets a write protection flag in a guest command buffer associated with a virtual machine and injects a semaphore command into a shadow command buffer in response to a fault. The fault is to correspond to a write of a graphics command to the guest command buffer by code executing in graphics hardware. In one example, the technology also conducts a security scan of the graphics command in response to a context switch in the graphics hardware, wherein the context switch is to be associated with the semaphore command.

Supporting self-modifying graphics workloads in fully virtualized graphics architectures

An embodiment of a semiconductor package apparatus may include technology to manage one or more virtual graphic processor units, and co-schedule the one or more virtual graphic processor units based on both general processor instructions and graphics processor instructions. Other embodiments are disclosed and claimed.

Hybrid virtual GPU co-scheduling

Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.

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Tampere, Finland

Zhi Wang