Tsinghua University

Zhi-hong Liu

Jie Cui

Yue Zhao

Jun Fu

Yu-dong Wang

Wei Zhang

Gao-qing Li

Zheng-li Wu

Ping Xu

Wen-pu Cui

The present invention provides a general four-port on-wafer high frequency de-embedding method. The method comprises: for each on-wafer de-embedding dummy, building a model considering the distributive nature of high frequency characteristics of the on-wafer de-embedding dummy; obtaining the intrinsic Y-parameter admittance matrix of said N on-wafer de-embedding dummies by calculation or simulation by using said models; and solving the equation set which the corresponding measurement and calculation or simulation data of said on-wafer de-embedding dummies satisfy for the elements of the related admittance matrices of the parasitic four-port network to be stripped in de-embedding and model parameters of models on which said calculation or simulation is based.

General four-port on-wafer high frequency de-embedding method

The present invention discloses a metal silicide self-aligned SiGe heterojunction bipolar transistor, which is designed to overcome the shortcomings such as the large base resistance Rof the prior art products. The metal silicide self-aligned SiGe heterojunction bipolar transistor of the present invention mainly comprises an Si collector region, a local dielectric region, a base region, a base-region low-resistance metal silicide layer, a polysilicon emitter region, an emitter-base spacer dielectric region composed of a liner silicon oxide layer and a silicon nitride inner sidewall, a monocrystalline emitter region, a contact hole dielectric layer, an emitter metal electrode and a base metal electrode. The base-region low-resistance metal silicide layer extends all the way to the outside of the emitter-base spacer dielectric region. The present invention discloses a method of forming a metal silicide self-aligned SiGe heterojunction bipolar transistor, which is used to form the aforesaid bipolar transistor. The metal silicide self-aligned SiGe heterojunction bipolar transistor and the method of forming the same of the present invention can reduce the base resistance R, and feature a simple process and a low cost.

Metal silicide self-aligned SiGe heterojunction bipolar transistor and method of forming the same

The present invention discloses a bipolar transistor with an embedded epitaxial external base region, which is designed to solve the problem of the TED effect with the prior art structures. The bipolar transistor with an embedded epitaxial external base region of the present invention comprises at least a collector region, a base region and an external base region on the collector region, an emitter on the base region, and sidewalls at both sides of the emitter. The external base region is grown through an in-situ doping selective epitaxy process and is embedded in the collector region. A portion of the external base region is located beneath the sidewalls. The present invention discloses a method of forming a bipolar transistor with an embedded epitaxial external base region. The bipolar transistor with an embedded epitaxial external base region of the present invention avoids the TED effect and reduces the resistance of the external base region of the device so that the performance of the device is improved. The method of forming a bipolar transistor with an embedded epitaxial external base region of the present invention achieves the aforesaid bipolar transistor with an embedded epitaxial external base region, and features concise steps, a low cost and simple operations, and the structure obtained has good performance.

Bipolar transistor with embedded epitaxial external base region and method of forming the same

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Beijing, China

Zhi-hong Liu