Synopsys, Inc.

Zhenyu Gu

Kenneth S McElvain

Techniques for statistical formal activity analysis with consideration of temporal and/or spatial correlations are described herein. According to one embodiment, a machine-implemented method for circuit analysis comprises unrolling a sequential circuit having a feedback loop into a plurality of unrolled circuits and introducing a spatial correlation via an encoding circuit coupled to the plurality of unrolled circuits for an activity analysis of the sequential circuit, the spatial correlation representing a dependency relationship between logic states of an input and logic states of other signals.

Statistical formal activity analysis with consideration of temporal and spatial correlations

Techniques for statistical formal activity analysis with consideration of temporal and/or spatial correlations are described herein. According to one embodiment, a sequential circuit having a feedback loop is unrolled into multiple unrolled circuits, where the sequential circuit is represented by a finite state machine (FSM). A temporal correlation is introduced to each of the unrolled circuits via a correlation network for an activity analysis of the sequential circuit. The temporal correlation represents a dependency relationship between a current logic state of a signal and a previous logic state of the signal. Other methods and apparatuses are also described.

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Santa Clara, CA, United States of America

Zhenyu Gu