Suzhou Oriental Semiconductor Co., Ltd.

Nanjing Medical University

Zhenyi Xu

Wei Liu

Yi Gong

Zhendong Mao

Yuanlin Yuan

Xin Wang

Hao Lin

Ninghan Feng

Fengping Liu

Yifan Tang

Disclosed is an integrated urine anaerobic collection and culture apparatus, comprising: a catheter, at a front end of which a circular arc-shaped guide part and a first through hole are arranged, where a piston part is arranged inside the front end of the catheter; a first branch tube and a second branch tube, which are connected with the catheter, the first branch tube is connected with a first negative pressure vessel, and the first branch tube and the second branch tube are respectively provided with a first valve and a second valve; an aseptic centrifuge tube, which includes a tube body and a first cover body, where the first cover body is provided with a first check valve and a second check valve; a second negative pressure vessel. The present disclosure can realize the whole anaerobic operation of urine collection and culture in the bladder.

Integrated urine anaerobic collection and culture apparatus

The present application belongs to the technical field of semiconductor power devices and provides a semiconductor power device. The semiconductor power device includes an n-shaped substrate, an n-shaped epitaxial layer positioned on the n-shaped substrate, and at least three grooves recessed inside the n-shaped epitaxial layer, where a portion of the n-shaped epitaxial layer between two adjacent grooves of the at least three grooves is a mesa structure, an upper part of the mesa structure is provided with a p-shaped body region, and an n-shaped source region is provided inside the p-shaped body region. The mesa structure includes at least one mesa structure with a lower width being a first width and at least one mesa structure with a lower width being a second width, and the second width is greater than the first width.

Semiconductor power device

A gate trench and a source trench are formed simultaneously in the same etching process, a p-type semiconductor layer and a p-type doped region can be contacted in a self-aligned manner in the source trench, and the process is simple. A first insulating layer and a first gate are formed in a lower part of the gate trench, and a second insulating layer and a second gate are formed in an upper part of the gate trench so that the thick first insulating layer can protect the second gate from being easily broken down, the first gate can increase an electric field near a bottom of the gate trench, and thus a voltage withstand level of the semiconductor device can be improved. A bottom of the source trench can penetrate deep into a second n-type semiconductor layer.

Manufacturing method of a semiconductor device

A manufacturing method of a semiconductor power device includes the following steps: An n-type substrate is etched in a self-aligning manner using a first insulating layer, a second insulating layer, and a third insulating layer as a mask to form a second groove in the n-type substrate. A fourth insulating layer and a gate are formed in the second groove.

Manufacturing method of semiconductor power device

Disclosed is a method for manufacturing a semiconductor super-junction device. The method includes: a p-type column is formed through an epitaxial process, and then a gate is formed in a self-alignment manner.

Growing community of inventors

Jiangsu, China

Zhenyi Xu