Boe Technology Group Co., Ltd.

Ordos Yuansheng Optoelectronics Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Zhenhong Xiao

Jingyi Xu

Peirong Huo

Peng Liu

Bo Li

Hong Liu

Chao Liang

Jiantao Liu

Yongqiang Zhang

Aiyu Ding

Wei Yan

Feng Li

Zhen Wang

Bo Huang

Jianyun Xie

Hui Yuan

Yadong Zhang

Jian Sun

Changcheng Liu

Yusheng Liu

Yi Fan

Xin Han

The present disclosure provides a gate driving circuit and a display panel. The display panel includes a display area and a peripheral area surrounding the display area. At least one gate driving circuit is arranged in the peripheral area. The at least one gate driving circuit includes a plurality of shift register units cascaded in sequence. The plurality of shift register units include first shift register units and second shift register units. The first shift register units and the second shift register units are spaced apart from each other. The number of transistors in the first shift register units is smaller than the number of transistors in the second shift register units.

Gate driving circuit and display device

A display panel includes a display area, a peripheral area and an opening area. The display panel includes: first data lines including first sub-data lines and second sub-data lines; data selectors including first data selectors and second data selectors, where the first data selectors are electrically connected with the first sub-data lines, and the second data selectors are electrically connected with the second sub-data lines; a plurality of data signal input terminals; a plurality of first data selection data lines including first sub-data selection data lines and second sub-data selection data lines, where the first sub-data selection data lines are electrically connected with the first data selectors, and the second sub-data selection data lines are electrically connected with the second data selectors and the data signal input terminal; and a plurality of first connection leads located outside the opening area and extending from the display area to the peripheral area.

Display panel and display apparatus

A display panel includes an active area; a fanout region; and a bonding region located on one side of the fanout region away from the active area. A driver chip is disposed in the bonding region. The driver chip includes a first side edge adjacent to the fanout region, a second side edge opposite to the first side edge, and two third side edges. The driver chip includes a plurality of output terminals disposed close to the first side edge. The display panel includes: a plurality of fanout lines located in the fanout region; and a plurality of gull-wing lines located in the bonding region. Part of the fanout lines extend from the fanout region to a region where the first side edge is located, and are electrically connected to the output terminals. Another part of the fanout lines are electrically connected to the output terminals via the gull-wing lines.

Display panel and display device

An includes a display area and a non-display area that at least partially surrounds the display area; the non-display area includes at least two clock signal lines, wherein a ratio of a spacing between two adjacent clock signal lines to a line width of the clock signal lines is greater than or equal to 3.

Array substrate and display device

Provided is a touch display substrate. The touch display substrate includes a base substrate, including a display region and a non-display region; a plurality of touch electrodes disposed in the display region; and a plurality of signal transmission circuits, a plurality of first control lines, a plurality of second control lines, a target signal line, and a plurality of touch signal lines that are disposed in the non-display region.

Touch display substrate and driving method therefor, and display device

The present disclosure provides an array substrate and a display panel. The array substrate includes a base substrate and at least one signal line unit in a fan-out region of the base substrate. Each of the at least one signal line unit includes two first signal lines and one second signal line, and the two first signal lines and the one second signal line are respectively in different layers and extend in a same direction. A center line of an orthographic projection of the one second signal line on the base substrate overlaps with a center line of an orthographic projection of an interval region between the two first signal lines.

Array substrate and display panel

A substrate in an array substrate includes a light aperture region and a winding region arranged around the light aperture region. On the substrate, an orthographic projection of a first winding in each first signal line is overlapped with an orthographic projection of a second winding in a corresponding second signal line. In this way, the distance between two adjacent signal lines in the winding region is larger, and the parasitic capacitance generated between them is smaller.

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Beijing, China

Zhenhong Xiao