Applied Materials, Inc.

International Business Machines Corporation

Solarcity Corporation

Tesla, Inc.

Silevo, Inc.

Ebots Inc.

Globalfoundries Inc.

Sierra Solar Power (hangzhou) Co., Ltd.

Sierra Solar Power, Inc.

Zheng Xu

Jianming Fu

Fusen E Chen

Zhenxing Bi

Peijun Ding

Kangguo Cheng

Jiunn Benjamin Heng

Dongbing Shao

John C Forster

Praburam Gopalraja

Gongda Yao

Barry Lee Chin

Dexin Kong

Ruqiang Bao

Hong Zhang

Gene Y Kohara

Tony P Chiang

Chentao Yu

Qianwen Chen

Ashok K Sinha

Howard E Grunes

Wei D Wang

Bobby Yang

Tse-Yong Yao

Juntao Li

Girish Anant Dixit

Jaim Nulman

Hoa Thi Kieu

Xianmin Tang

Avi Tepman

Roderick Craig Mosely

Ralf Hofmann

Yang Liu

Rong Tao

Suraj Rengarajan

Lawrence Alfred Clevenger

Peng Xu

Michael A Miller

Sergio Edelstein

Christopher James Beitel

Choonghyun Lee

Chen Zhang

Wei W Wang

Arvind Sundarrajan

Huan Hu

Xin Zhang

Bradley Owen Stimson

Wei Wang

Kehan Tian

Kenny King-Tai Ngan

Michael Rosenstein

Hougong Wang

Chieh-Yu Lin

Daniel Clarence Lubben

Kai C Yung

Mani Subramani

Jianjun Liang

MingDu Kang

Tenko Yamashita

Chengwen Pei

Anantha K Subramani

Rasit Onur Topaloglu

Kafai Lai

Kenny King-tai Ngan

Hung H Tran

Aihua Chen

Yan Rozenzon

Pinping Sun

Peter Satitpunwaycha

Zhigang Xie

Steve Poppe

Julio A Aranovich

Yufei Wu

Vijay D Parkhe

Kai D Feng

Yan Ye

Dan Maydan

Robert B Lowrance

Sasson Roger Somekh

Bodhisatwa Sadhu

Liubo Hong

Yongan Xu

Shyng-Tsong Chen

Xing Chen

Diana Xiaobing Ma

Seshadri Ramaswami

Fuhong Zhang

Herschel Akiba Ainspan

Hyman J Levinstein

Jick M Yu

Daniel A Carl

Gilbert Hausmann

Jing Sha

Marc O Schweitzer

Peter P Nguyen

Barney M Cohen

Igor G Kogan

Ollivier Jacky Lefevre

Fernand Dorleans

Kushagra Sinha

Semiconductor devices and methods for forming the semiconductor devices are described. An example semiconductor structure can include a substrate including a first electrode. The example semiconductor structure can further include a heater element directly contacting the first electrode in the substrate. The example semiconductor structure a phase change cell directly on the heater element. The sidewalls of the phase change cell can be encapsulated with a spacer. The example semiconductor structure a second electrode directly on the phase change cell and the spacer.

Phase change memory with encapsulated phase change element

A Voltage-Controlled Oscillator (VCO) includes a cross-coupled transconductance cell. A transformer comprising a primary coil and at least one secondary coil, wherein the primary coil is connected to the cross-coupled transconductance cell. A primary coil varactor is connected to the cross-coupled transconductance cell in parallel to the primary coil. A variable inductive tuning component connected to the at least one secondary coil. A mode switch connected to the at least one secondary coil and configured to select a frequency mode of operation of the VCO by engaging or disengaging the variable inductive tuning component from operation with the primary coil varactor to generate oscillation at a center frequency of the VCO.

Frequency control in a multi-mode VCO

One embodiment can provide a machine-vision system that includes one or more stereo-vision modules. A respective stereo-vision module can include a structured-light projector, a first camera positioned on a first side of the structured-light projector, and a second camera positioned on a second side of the structured-light projector. The first and second cameras are configured to capture images of an object under illumination by the structured-light projector. The structured-light projector can include a laser-based light source and an optical modulator configured to reduce speckles caused by the laser-based light source.

System and method for 3D pose measurement with high precision and real-time object tracking

One embodiment can provide a robotic system. The system can include a machine-vision module, a robotic arm comprising an end-effector, and a robotic controller configured to control movements of the robotic arm to move a component held by the end-effector from an initial pose to a target pose. While controlling the movements of the robotic arm, the robotic controller can be configured to move the component in a plurality of steps. Displacement of the component in each step is less than or equal to a predetermined maximum displacement value.

System and method for improving accuracy of 3D eye-to-hand coordination of a robotic system

A testing apparatus and a method for testing an integrated circuit are described. One embodiment of the testing apparatus may comprise a main probe pin configured for electrical testing of a sample, the sample having a terminal pad, and a secondary probe pin configured for contact testing of the main probe pin against the terminal pad. In some embodiments, the testing apparatus may further comprise an indicator circuit electrically connected to the main probe pin and the secondary probe pin. The indicator circuit may output a signal when the main probe pin and the secondary probe pin are in simultaneous electrical engagement with the terminal pad.

Method for accurate pad contact testing

One embodiment can provide a robotic system. The robotic system can include a robotic arm comprising an end-effector, a robotic controller configured to control movements of the robotic arm, and a dual-resolution computer-vision system. The dual-resolution computer-vision system can include a low-resolution three-dimensional (3D) camera module and a high-resolution 3D camera module. The low-resolution 3D camera module and the high-resolution 3D camera module can be arranged in such a way that a viewing region of the high-resolution 3D camera module is located inside a viewing region of the low-resolution 3D camera module, thereby allowing the dual-resolution computer-vision system to provide 3D visual information associated with the end-effector in two different resolutions when at least a portion of the end-effector enters the viewing region of the high-resolution camera module.

3D computer-vision system with variable spatial resolution

One embodiment can provide a robotic system. The system can include a machine-vision module, a robotic arm comprising an end-effector, a robotic controller configured to control movements of the robotic arm, and an error-compensation module configured to compensate for pose errors of the robotic arm by determining a controller-desired pose corresponding to a camera-instructed pose of the end-effector such that, when the robotic controller controls the movements of the robotic arm based on the controller-desired pose, the end-effector achieves, as observed by the machine-vision module, the camera-instructed pose. The error-compensation module can include a machine learning model configured to output an error matrix that correlates the camera-instructed pose to the controller-desired pose.

System and method for error correction and compensation for 3D eye-to-hand coordination

A semiconductor structure includes a three-dimensional stacked transistor structure including first and second field-effect transistors of a first type at a first vertical level and third and fourth field-effect transistors of a second type at a second vertical level disposed over the first vertical level. The semiconductor structure also includes a first gate structure shared between the first and second field-effect transistors at the first vertical level, a second gate structure shared between the third and fourth field-effect transistors at the second vertical level, and a gate contact shared by the first and second gate structures. The wherein the first and second gate structures are vertically aligned with another in a layout of the three-dimensional stacked transistor structure between source drain/regions of the first, second, third and fourth field-effect transistors.

Circuit wiring techniques for stacked transistor structures

Methods of forming a settable resistance device, settable resistance devices, and neuromorphic computing devices include isotropically etching a stack of layers, the stack of layers having an insulator layer in contact with a conductor layer, to selectively form divots in exposed sidewalls of the conductor layer. The stack of layers is isotropically etched to selectively form divots in exposed sidewalls of the insulator layer, thereby forming a tip at an interface between the insulator layer and the conductor layer. A dielectric layer is formed over the stack of layers to cover the tip. An electrode is formed over the dielectric layer, such that the dielectric layer is between the electrode and the tip.

Nanotip filament confinement

Embodiments disclosed herein include an RRAM cell. The RRAM cell may include a first nanowire electrically connected to a first wordline electrode. The nanowire may include a first sharpened point distal from the first wordline electrode. The RRAM cell may also include a metal contact electrically connected to a bitline electrode and a high-&#x3ba; dielectric layer directly between the nanowire and the metal contact.

Filament confinement in resistive random access memory

A method of forming a semiconductor structure includes forming a dielectric layer, forming a plurality of mandrel lines over the dielectric layer, and forming a plurality of non-mandrel lines over the dielectric layer between adjacent ones of the mandrel lines utilizing self-aligned double patterning. The method also includes forming at least one spacer-merge region extending from a first portion of a first one of the mandrel lines to a second portion of a second one of the mandrel lines in a first direction and covering at least a portion of one or more of the non-mandrel lines between the first mandrel and the second mandrel in a second direction orthogonal to the first direction. The method further includes forming a plurality of trenches in the dielectric layer by transferring a pattern of (i) the mandrel lines and (ii) portions of the non-mandrel lines outside the at least one spacer-merge region.

Self-aligned double patterning with spacer-merge region

An approach to form a semiconductor structure with a multiple layer phase change material stack and four electrodes that functions as an integrated switch device. The semiconductor structure includes a sidewall spacer that is on two opposing sides of the multiple layer phase change material stack contacting an edge of each layer of the multiple layer phase change material stack. The semiconductor structure includes a pair of a first type of electrode, where each of the pair of the first type of electrode abuts each of the sidewall spacers on the two opposing sides of the multiple layer phase change material stack. A pair of a second type of electrode, where each of the second type of electrode abuts each of two other opposing sides of the multiple layer phase change material stack and contacts a heater material on outside portions of the multiple layer phase change material stack.

Integrated switch using stacked phase change materials

A method of performing co-integrated fabrication of a non-volatile memory (NVM) and a gate-all-around (GAA) nanosheet field effect transistor (FET) includes recessing fins in a channel region of the NVM and the FET to form source and drain regions adjacent to recessed fins, and removing alternating portions of the recessed fins of the NVM and the FET to form gaps in the recessed fins. A stack of layers that make up an NVM structure are conformally deposited within the gaps of the recessed fins leaving second gaps, smaller than the gaps, and above the recessed fins of the NVM while protecting the FET with the organic planarization layer (OPL) and a block mask. The OPL and block mask are removed from the FET, and another OPL and another block mask protect the NVM while a gate of the FET is formed above the recessed fins and within the gaps.

Co-integration of non-volatile memory on gate-all-around field effect transistor

A method is presented for forming a nanowire electrode. The method includes forming a plurality of nanowires over a first substrate, depositing a conducting layer over the plurality of nanowires, forming solder bumps and electrical interconnections over a second flexible substrate, and integrating nanowire electrode arrays to the second flexible substrate. The plurality of nanowires are silicon (Si) nanowires, the Si nanowires used as probes to penetrate skin of a subject to achieve electrical biopotential signals. The plurality of nanowires are formed over the first substrate by metal-assisted chemical etching.

Flexible silicon nanowire electrode

Growing community of inventors

Pleasanton, CA, United States of America

Zheng Xu