Illinois Institute of Technology

Great Wall Semiconductor Corporation

University of Central Florida Research Foundation, Inc.

Zheng John Shen

David N Okada

Yuanfeng Zhou

Patrick Shea

Issa E Batarseh

Haibing Hu

Xiang Fang

Zhixi Deng

Risha Na

A circuit breaker and method of operation. The circuit breaker includes a first current path including a mechanical switch, such as an ultrafast mechanical switch, and a second current path in parallel connection to the first current path, and including a current injector, such as a transient commutation current injection circuit, in series with bidirectional power electronic switch. A short circuit fault current from a mechanical switch path is communicated to the electronic path via a current injection, followed by interrupting the fault current. A pulse current is generated to the electronic switch in the second current path, and the mechanical switch is opened during the pulse current. The pulse current and the electronic switch reduce or eliminate arcing upon the opening the mechanical switch.

Hybrid circuit breaker using a transient commutation current injector circuit

A wireless-controlled smart plug device and methods of use and operation, using a solid state switch to provide electrical power from an outlet to a load, and provide protection against overload, short circuit, ground, arc, or voltage surge faults. The switch includes a bidirectional semiconductor switch with two back-to-back connected transistors, such as silicon power MOSFETs, silicon insulated-gate bipolar transistors (IGBTs), silicon carbide (SiC) transistors, or gallium nitride (GaN) transistors, each configured to control the current flow from the electrical receptacle to the external electrical load.

Solid state protective smart plug device

A momentary circuit interrupter in series connection with a mechanical switch to provide protection against short circuit faults in a DC power circuit. The momentary circuit interrupter injects a transient voltage pulse via a pulse transformer to reduce a DC fault current to near zero in a DC circuit branch, thus allowing the mechanical switch to disconnect the faulty branch under a near zero-current condition. The power electronic circuit on the primary side of the transformer controls the discharge of a plurality of pre-charged capacitors to generate the transient voltage pulse during the fault interruption process, but otherwise does not incur any power loss during normal operation. The secondary winding of the pulse transformer conducts the main DC current, and is highly conductive to minimize the conduction power loss. The invention provides ultrafast response to a short circuit fault (even faster than solid-state circuit breakers and much faster than hybrid circuit breakers), significantly reduced overcurrent stress in the power system, and/or ultralow conduction power losses.

Direct current momentary circuit interrupter

A solid-state circuit breaker for a DC power system which may operate unidirectional and bidirectional and does not require an external power supply to provide current interruption protection during an event of a short circuit fault.

Self-powered DC solid state circuit breakers

A multi-transformer LLC (resonant) power converter having at least two transformers including a first Tand a second transformer Tin series includes a switch network configured for receiving input power including a first and second switched node. Resonant circuitry is coupled between the first and second switched node including a series combination of an inductor, a capacitor, a primary winding of Tand a primary winding of a T. At least one switch is operable for providing a first mode that includes Tin the resonant circuitry and a second mode that excludes Tfrom the resonant circuitry. Secondary windings of Tand Tare connected electrically in parallel for driving an output capacitor (Co) through respective rectifiers which provide conversion from AC to DC.

Resonant power converter having switched series transformer

A semiconductor device has a substrate and first and second gate structures formed over a first surface of the substrate. A drain region is formed in the substrate as a second surface of the substrate. An epitaxial region is formed in the substrate over the drain region. A sidewall spacer is formed over the first and second gate structures. A lateral LDD region is formed between the first and second gate structures. A trench is formed through the lateral LDD region and partially through the substrate self-aligned to the sidewall spacer. A vertical drift region is formed along a sidewall of the trench. An insulating material is deposited in the trench. A first source region is formed adjacent to the first gate structure opposite the lateral LDD region. A second source region is formed adjacent to the second gate structure opposite the lateral LDD region.

Semiconductor device and method of forming junction enhanced trench power MOSFET

A semiconductor device has a substrate and trench formed partially through the substrate. A drain region is formed in the substrate as a second surface of the substrate. An epitaxial region is formed in the substrate over the drain region. A vertical drift region is formed along a sidewall of the trench. An insulating material is deposited within the trench. A channel region is formed along the sidewall of the trench above the insulating material. The channel region is separated from the insulating material. A gate structure is formed within the trench adjacent to the channel region. The gate structure includes an insulating layer formed along the sidewall of the trench adjacent to the channel region and polysilicon layer formed within the trench over the insulating layer. A source region is formed in a first surface of the substrate contacting the channel region.

Semiconductor device and method of forming junction enhanced trench power MOSFET having gate structure embedded within trench

A cost-effective, ultra-compact, hybrid power module packaging system and method for making allows device operation in conventional and high temperature ranges over 300&#xb0; C. Double metal leadframes are directly bonded to the front- and backside of semiconductor chips, and injection-molded high temperature polymer materials encapsulate the module. The invention eliminates the use of unreliable metal wirebonds and solders joints, and expensive aluminum nitride ceramic substrates commonly used in conventional and high temperature hybrid power modules. Advantages of the new power modules include high current carrying capability, low package parasitic impedance, low thermo-mechanical stress under high temperature cycling, low package thermal resistance (double-side cooling), modularity for easy system-level integration, and low-cost manufacturing of devices compatible with current electronic packaging industry. A first embodiment uses molybdenum leadframes for operation in temperatures over 300&#xb0; C.; a second embodiment of the invention, uses copper and copper alloy leadframes, provides benefits for conventional temperature electronics.

High-temperature, wirebondless, injection-molded, ultra-compact hybrid power module

An integrated circuit chip comprising a bond wire and a mass of magnetic material provided on the bond wire, wherein the mass of magnetic material increases the inductance of the bond wire.

On-chip magnetic components

Monolithic semiconductor structures having at least two pairs of two lateral semiconductor devices combined on a first surface of a single semiconductor substrate. Embodiments include connected source terminals defining common source terminals.

Monolithic power semiconductor structures including pairs of integrated devices

A system of interconnecting regions on an integrated semiconductor device or discrete components. As first connectivity layer has first and second runners to interconnect a plurality of first and second regions. A second connectivity layer has third runners to interconnect the first runners and fourth runners to interconnect the second runners. A third connectivity layer has first pads connected to the third runners and second pads connected to the fourth runners. Solder bumps are used on the first and second pads to connect the pads to other circuits.

Growing community of inventors

Oviedo, FL, United States of America

Zheng John Shen