Omnivision Technologies, Inc.

Zhenfu Tian

Hiroaki Ebihara

Satoshi Sakurai

Rui Wang

Liang Zuo

Shan Chen

Tao Sun

Zheng Yang

Yan Li

Dong Yang

Yu-Shen Yang

Peter Bartkovjak

Yi Liu

Wen He

A local ramp buffer includes a deep N− well layer disposed in a P− substrate beneath a surface of the P− substrate, a P− well disposed between the surface of the P− substrate and the deep N− well layer, and an N− well structure disposed in the P− substrate and coupled to the deep N− well layer. The N− well structure is disposed between the surface of the P− substrate and the deep N− well layer. The P− well is disposed inside an opening in the N− well structure. The N− well structure and the deep N− well layer are configured to isolate the P− well within the opening. A source follower transistor is disposed in the P− well. The source follower transistor includes a gate terminal coupled to the N− well structure and a ramp generator.

Deep N-well driven ramp buffer

Image sensors with improved negative pump voltage settling, and circuitry for the same, are disclosed herein. In one embodiment, a power supply settling circuit includes a negative charge pump and a reference voltage generator. An output of the negative charge pump is selectively coupled to a first node of the negative pump settling circuit via a first switch, and an output of the reference voltage generator is selectively coupled to a second node of the negative pump settling circuit via a second switch. The first node is further selectively coupled to ground via a third switch, and the second node is further selectively coupled to ground via a fourth switch. The first node can additionally be coupled to a first pad, and the second node can additionally be coupled to a second pad. The pads can each be coupled to a capacitor, such as an off-chip capacitor.

Image sensors with improved negative pump voltage settling, and circuitry for the same

A failure detection circuit for an image sensor includes a first input node, an array of second input nodes, and an output stage. The first input node is coupled to a reference voltage. The array of second input nodes has each input node coupled to receive a signal from a bitline of a bitline array in an image sensor that includes an array of pixels with each pixel is coupled to at least one bitline of the bitline array. The output stage is coupled to generate an output voltage indicative of any of the second input nodes being lower than the reference voltage.

Column ASIL circuit for multiple bitlines in an image sensor

A ramp buffer circuit includes a ramp buffer input device having an input coupled to receive a ramp signal. A current monitor is circuit coupled to a power line and the ramp buffer input device to generate a current monitor signal in response to an input current conducted through the ramp buffer input device. A corner bias circuit is coupled to the current monitor circuit to generate an assist bias voltage in response to the current monitor signal. A bias current source is coupled to an output of the ramp buffer input device. An assist current source is coupled to the corner bias circuit and coupled between the output of the ramp buffer input device and ground to conduct an assist current from the output of the ramp buffer input device to ground in response to the assist bias voltage.

Calibration circuit for ramp settling assist circuit in local ramp buffer circuit

A ramp generator includes an operational amplifier having an output to generate a ramp signal. An integration current source is coupled to a first input and a reference voltage is coupled to a second input of the operational amplifier. A feedback capacitor is coupled between the first input and the output of the operational amplifier. A monitor circuit is coupled to the first and second inputs of the operational amplifier to generate an output flag in response to a comparison of the first and second inputs. A trimming control circuit is configured to generate a trimming signal in response to the output flag. An assist current source is configured to conduct an assist current from the output of the operational amplifier to ground in response the trimming signal generated by the trimming control circuit.

Trimming control circuit for current integration ramp DAC settling assist circuit

A ramp buffer circuit includes an input device having an input coupled to receive a ramp signal. A bias current source is coupled to an output of the input device. The input device and the bias current source are coupled between a power line and ground. An assist current source is coupled between the output of the input device and ground. The assist current source is configured to conduct an assist current from the output of the input device to ground only during a ramp event generated in the ramp signal.

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San Jose, CA, United States of America

Zhenfu Tian