TSMC Solid State Lighting Ltd.

Epistar Corporation

National Yang Ming Chiao Tung University

Other

Atomic Energy Council-institute of Nuclear Energy Research

Atomic Energy Council

Zhen-Yu Li

Hao-Chung Kuo

Hsing-Kuo Hsia

Kuan-Chun Chen

You-Da Lin

Tsun-Neng Yang

Shan-Ming Lan

Chien-Te Ku

Yu-Hsiang Huang

Meng-Chu Chen

Chung-Pao Lin

Hsin-Chieh Huang

Chun-Yen Chang

Ming-Hua Lo

Hon-Way Lin

Yu-Han Su

An-Jye Tzou

Chao-Hsun Wang

Chunyen Chang

Cindy Huichun Shu

A lighting device includes a plurality of light-emitting diodes including a first light-emitting diode with a non-rectangular shape in a top view, a submount to which each of the plurality of light-emitting diodes is coupled, and a plurality of conductive elements formed between the submount and the plurality of light-emitting diodes to electrically connecting at least a portion of the plurality of light-emitting diodes with each other in series.

Lighting device

The present disclosure involves a method of fabricating a semiconductor device. A surface of a silicon wafer is cleaned. A first buffer layer is then epitaxially grown on the silicon wafer. The first buffer layer contains an aluminum nitride (AlN) material. A second buffer layer is then epitaxially grown on the first buffer layer. The second buffer layer includes a plurality of aluminum gallium nitride (AlGaN) sub-layers. Each of the sub-layers has a respective value for x that is between 0 and 1. A value of x for each sub-layer is a function of its position within the second buffer layer. A first gallium nitride (GaN) layer is epitaxially grown over the second buffer layer. A third buffer layer is then epitaxially grown over the first GaN layer. A second GaN layer is then epitaxially grown over the third buffer layer.

Method of growing a high quality III-V compound layer on a silicon substrate

A light emitting device is provided. The light emitting device includes a substrate, an N type semiconductor layer formed on the substrate, an active layer, an electron-blocking layer, and a P type semiconductor layer formed on the electron-blocking layer. An N side electrode is formed on a first portion of the N type semiconductor layer, and the active layer is formed on a second portion of the N type semiconductor layer. The electron-blocking layer is a super lattice multi-layer structure formed on the active layer, the P type semiconductor layer is formed on the electron-blocking layer, and a P side electrode is formed on a portion of the P type semiconductor layer.

Semiconductor light emitting device

A high electron mobility transistor is provided, which includes a substrate, a superlattice structure formed on the substrate, and a transistor epitaxial structure formed on the superlattice structure such that the superlattice structure is interposed between the substrate and the transistor epitaxial layer. As the high electron mobility transistor has the carbon-doped AlN/GaN superlattice structure between the substrate and the transistor epitaxial layer. Thus, the present invention can effectively reduce vertical leakage current, so as to improve the epitaxial quality and the breakdown voltage of the high electron mobility transistor.

High electron mobility transistor

The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a light-emitting diode (LED) die. The LED die is a vertical LED die in some embodiments. The LED die includes a substrate. A p-doped III-V compound layer and an n-doped III-V compound layer are each disposed over the substrate. A multiple quantum well (MQW) layer is disposed between the p-doped III-V compound layer and the n-doped III-V compound layer. The p-doped III-V compound layer includes a first region having a non-exponential doping concentration characteristic and a second region having an exponential doping concentration characteristic. In some embodiments, the second region is formed using a lower pressure than the first region.

Growing an improved P-GaN layer of an LED through pressure ramping

The present disclosure involves an illumination apparatus. The illumination apparatus includes an n-doped semiconductor compound layer, a p-doped semiconductor compound layer spaced apart from the n-doped semiconductor compound layer, and a multiple-quantum-well (MQW) disposed between the first semiconductor compound layer and the second semiconductor compound layer. The MQW includes a plurality of alternating first and second layers. The first layers of the MQW have substantially uniform thicknesses. The second layers have graded thicknesses with respect to distances from the p-doped semiconductor compound layer. A subset of the second layers located most adjacent to the p-doped semiconductor compound layer is doped with a p-type dopant. The doped second layers have graded doping concentration levels that vary with respect to distances from the p-doped semiconductor layer.

III-V group compound devices with improved efficiency and droop rate

A lighting apparatus includes a polygon die including a plurality of light-emitting diodes (LEDs), and a submount to which each of the LEDs is coupled. Each LED includes a plurality of epi-layers which contains a p-type layer, an n-type layer, and a multiple quantum well (MQW) disposed between the p-type layer and the n-type layer, and a p-type electrode and an n-type electrode which are electrically coupled to the p-type layer and the n-type layer, respectively. The p-type and the n-type electrodes are located between the submount and the epi-layers. The submount contains a plurality of conductive elements configured to electrically couple at least a portion of the plurality of LEDs in series. At least some of the plurality of LEDs have non-rectangular top view shapes.

High voltage LED with improved heat dissipation and light extraction

The present disclosure involves an apparatus. The apparatus includes a substrate having a front side a back side opposite the front side. The substrate includes a plurality of openings formed from the back side of the substrate. The openings collectively define a pattern on the back side of the substrate from a planar view. In some embodiments, the substrate is a silicon substrate or a silicon carbide substrate. Portions of the silicon substrate vertically aligned with the openings have vertical dimensions that vary from about 100 microns to about 300 microns. A III-V group compound layer is formed over the front side of the silicon substrate. The III-V group compound layer is a component of one of: a light-emitting diode (LED), a laser diode (LD), and a high-electron mobility transistor (HEMT).

Pre-cutting a back side of a silicon substrate for growing better III-V group compound layer on a front side of the substrate

A semiconductor light emitting device is disclosed, which comprises: a substrate having a first surface and a second surface; a first semiconductor conductive layer is disposed on the first surface of the substrate; an insert layer is disposed on the first semiconductor conductive layer; an active layer is disposed on the insert layer; a second semiconductor conductive layer is disposed on the active layer; a first electrode is disposed on the second semiconductor conductive layer; and a second electrode is disposed on the second surface of the substrate, in which the electric of the second electrode is opposite to that of the first electrode.

Light emitting semiconductor device

There is disclosed a method for making solar cells with sensitized quantum dots in the form of nanometer metal crystals. Firstly, a first substrate is provided. Then, a silicon-based film is grown on a side of the first substrate. A pattern mask process is executed to etch areas of the silicon-based film. Nanometer metal particles are provided on areas of the first substrate exposed from the silicon-based film. A metal electrode is attached to an opposite side of the first substrate. A second substrate is provided. A transparent conductive film is grown on the second substrate. A metal catalytic film is grown on the transparent conductive film. The second substrate, the transparent conductive film and the metal catalytic film together form a laminate. The laminate is inverted and provided on the first substrate. Finally, electrolyte is provided between the first substrate and the metal catalytic film.

Method for making solar cells with sensitized quantum dots in the form of nanometer metal particles

A method is disclosed for making a thin-film poly-crystalline silicon solar cell. In the method, there is provided an ITO-glass substrate by coating a glass substrate with a transparent and conductive ITO film. An amorphous silicon film is grown on the ITO-glass substrate. An aluminum film is grown on the amorphous silicon film. The aluminum film and the amorphous silicon film are annealed and therefore converted and interchanged into an aluminum-silicon alloy film and a ppoly-crystalline silicon film, respectively. In a low-temperature plasma-based deposition process, a ppoly-crystalline silicon film is coated on the ppoly-crystalline silicon film, and an npoly-crystalline silicon film is coated on the ppoly-crystalline silicon film. An ohmic contact is provided on the transparent and conductive ITO film. Other ohmic contacts are provided on the npoly-crystalline silicon film. An anti-reflection film is coated on the npoly-crystalline silicon film.

Growing community of inventors

Chiayi County, Taiwan

Zhen-Yu Li