Intel Corporation

Montage Technology Co., Ltd.

Montage Electronics (shanghai) Co., Ltd.

Zhaohui Du

Gansha Wu

Tin-Fook Ngai

Dajiang Zhong

Li Liu

Jinzhan Peng

Zhiwei Ying

Shih-wei Liao

Peinan Zhang

Buqi Cheng

Bu Qi Cheng

Ken Lueh

Xiaoyan Li

Shiwei Liao

Men Long

Yang Chao

A data compression method includes: storing data to be written into a first address and a second address into a data buffer in response to a data write request to the first address and the second address of a memory module from a host; according to a relationship between the first address and the second address, selecting a compression scheme from pre-configured compression schemes, and attempting to compress the data to be written into the first address and the second address into compressed data that can be stored into either the first address or the second address by using a pre-defined compression method, if the attempt to compress successes, storing the compressed data into the first address or the second address of the memory module, and identifying the compressed data by using redundant ECC bits to form first identification information.

Data compression and decompression methods and systems

A data encryption and decryption system a host system, sequencer, hardware processor, direct memory access modules, and cryptography engines having input and output buffers, and symmetric encryption/decryption and digest algorithm modules. The host system determines encryption/decryption calculation and/or digest calculation method, and generates corresponding encryption/decryption and/or digest calculation commands. The sequencer analyzes the encryption/decryption and/or digest calculation commands to generate control flow commands, and controls one or more of the direct memory access modules via the control flow commands to input data to be encrypted/decrypted into the input buffer of one or more cryptography engines. The hardware processor controls the symmetric encryption/decryption algorithm module to perform encryption/decryption calculations according to the encryption/decryption calculation commands, and/or, controls the digest algorithm module to perform digest calculations on data to be encrypted/decrypted according to the digest calculation commands, and sends calculation results to the host system by the direct memory access module.

Data encryption and decryption system and method

The present disclosure provides systems and methods for deriving a key from a basekey built-in a chip is provided. In an exemplary embodiment, there is provided a method for deriving a key from basekey built-in a chip that may comprise obtaining a basekey built-in the chip and a current version number when the chip starts up and runs read-only boot code, and performing iterations on the basekey via a one-way function to obtain a derived key of the current version. The number of times of the iterations is equal to the difference between a maximum version number and the current version number.

Method and system for deriving key from basekey built-in chip

A method to provide effective control and data flow information in an Intermediate Representation (IR) form. A Path Sensitive single Assignment (PSA) IR form with effective and explicit control and data path information supports control flow sensitive optimizations such as path sensitive symbolic substitution, array privatization and speculative multi threading. In the definition of PSA form, besides defining new versioned variables, the gamma functions keep control path information. The gamma function in PSA form keeps the basic attribute of SSA IR form and only one definition exists for each use. Therefore, all existing Single Static Assignment (SSA) IR form based analysis can be applied in PSA form. The gamma function in PSA form keeps all essential control flow information and eliminates unnecessary predicates at the same time.

Method and system for intermediate representation of source code

A method including providing a stream of content to a processor, transforming kernels within the stream of content through affine modeling, transforming the affine modeled kernels, stream contracting kernel processes, and stream blocking the kernel processes.

Computation transformations for streaming applications on multiprocessors

A method for statement shifting to increase the parallelism of loops includes constructing a data dependence graph (DDG) to represent dependences between statements in a loop, constructing a basic equations group from the DDG, constructing a dependence equations group derived in part from the basic equations group, and determining a shifting vector for the loop from the dependence equations group, wherein the shifting vector to represent an offset to apply to each statement in the loop for statement shifting. Other embodiments are also disclosed.

Statement shifting to increase parallelism of loops

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Shanghai, China

Zhaohui Du