Qualcomm Incorporated

Zhang Jin

Haitao Cheng

Maulin Pareshbhai Bhagat

Chinmaya Mishra

Thomas Myers

Li-chung Chang

Aleksandar Miodrag Tasic

Rajagopalan Rangarajan

Junxiong Deng

Mohammad Farazian

Yung-Chung Lo

Youngchang Yoon

Abbas Abbaspour-Tamijani

Mohammad Ali Tassoudji

Bhushan Shanti Asuri

Chirag Dipak Patel

Aristotele Hadjichristos

Lai Kan Leung

Li Liu

Yiwu Tang

Yu-Chin Ou

Jorge Fabrega Sanchez

Ravi Sridhara

Tsai-Pi Hung

Wingching Vincent Leung

Guy Klemens

Ahmed A Youssef

Ehab Ahmed Sobhy Abdel Ghany

Hongyan Yan

Sang Hyun Woo

Ockgoo Lee

Yiping Han

Tao Yang

Apsara Ravish Suvarna

Lan Nan

Ning Yuan

Chiewcham Narathong

Jeong Ii Kim

Norman L Frederick

Thomas Andrew Myers

Rajagopala Rangarajan

Maulin Bhagat

In an aspect, an apparatus may be an apparatus for wireless communication. The apparatus for wireless communication may include a transceiver, a memory, and at least one processor coupled to the memory and configured to execute instructions stored in the memory to control the transceiver. In another aspect, an apparatus may be an apparatus for wireless communication. The apparatus for wireless communication may include a patch antenna coupled to the transceiver. The patch antenna includes a patch, a ground plane substantially located with respect to the patch, a probe feed coupled to the patch, and a slot-coupled feed configured to couple to the patch.

Hybrid feed technique for planar antenna

An integrated circuit (IC) includes a capacitor array in at least one first back-end-of-line (BEOL) interconnect level. The capacitor array includes a pair of capacitor manifolds coupled to parallel capacitor routing traces and capacitors coupled between each pair of parallel capacitor routing traces. The IC also includes an inductor trace having at least one turn in at least one second BEOL interconnect level. The inductor trace defines a perimeter to overlap at least a portion of the capacitor array.

Capacitor array overlapped by on-chip inductor/transformer

An integrated circuit includes a capacitor (e.g., a folded metal-oxide-metal (MOM) capacitor) formed in the lower BEOL interconnect levels, without degrading an inductor's Q-factor. The integrated circuit includes the capacitor in one or more back-end-of-line (BEOL) interconnect levels. The capacitor includes multiple folded capacitor fingers having multiple sides and a pair of manifolds on a same side of the folded capacitor fingers. Each of the pair of manifolds is coupled to one or more of the folded capacitor fingers. The integrated circuit also includes an inductive trace having one or more turns in one or more different BEOL interconnect levels. The inductive trace overlaps one or more portions of the capacitor.

Folded metal-oxide-metal capacitor overlapped by on-chip inductor/transformer

Certain aspects of the present disclosure provide a directional coupler. In certain aspects, the directional coupler generally includes a first inductor and a second inductor wirelessly coupled to the first inductor. In certain aspects, the directional coupler generally includes an input port at a first terminal of the first inductor and a transmitted port at a second terminal of the first inductor. In certain aspects, the directional coupler generally includes a coupled port at a first terminal of the second inductor and an isolated port at a second terminal of the second inductor. In certain aspects, the directional coupler generally includes a first complex impedance component directly coupled to the isolated port and a second complex impedance component directly coupled to the coupled port.

Directional coupler

Certain aspects of the present disclosure are generally directed to a structure for a balanced-unbalanced (balun) transformer. For example, certain aspects of the present disclosure provide a transformer that generally includes a first winding having a first terminal coupled to an input node and a second terminal coupled to a reference potential node. The transformer may also include a first impedance coupled between a center tap of the first winding and the reference potential node, and a second winding magnetically coupled to the first winding and having a first terminal coupled to a first differential node of a differential output pair, a second terminal coupled to a second differential node of the differential output pair, and a center tap coupled to the reference potential node.

Transformer with high common-mode rejection ratio (CMRR)

Various aspects described herein relate to low-loss multi-band multiplexing schemes for a wireless communications system, for example, a 5th Generation (5G) New Radio (NR) system. In an aspect, a multiplexer for multi-band wireless communications comprises at least one tuning component configured to transmit or receive at least one signal within a frequency band that is selected from a plurality of frequency bands. The multiplexer further comprises at least one combining component, communicatively coupled with the at least one tuning component, configured to transmit or receive the at least one signal within the selected frequency band. In an aspect, the at least one tuning component is integrated on a chip and the at least one combining component is not integrated on the chip.

Techniques for low-loss multi-band multiplexing

A coplanar waveguide may include a first transmission line extending between a first ground plane and a second ground plane at a first interconnect level. The coplanar waveguide may further include a shielding layer at a second interconnect level. The shielding layer may include a first set of conductive fingers coupled to the first ground plane. The first set of conductive fingers may be interdigitated with a second set of conductive fingers that are coupled to the second ground plane. Only a dielectric layer may be between the first set of conductive interdigitated fingers and the second set of conductive interdigitated fingers. The first ground plane, the second ground plane, the dielectric layer, and the shielding layer may form a capacitor.

On-chip coplanar waveguide having a shielding layer comprising a capacitor formed by sets of interdigitated fingers

Certain aspects of the present disclosure provide techniques and apparatus employing an isolation ring having a center strip of conductive material used to isolate magnetic fields generated by common-mode and differential-mode current flow through one or more inductors disposed in the ring. The apparatus generally includes an electrical component having an inductive element and a ring of electrically conductive material encircling the inductive element, wherein the ring has a strip of electrically conductive material disposed in the ring and connecting a first point on the ring to a second point on the ring.

Divided ring for common-mode (CM) and differential-mode (DM) isolation

A capacitor radio frequency (RF) shielding structure may include a ground plane partially surrounding a coupling capacitor in an RF signal path. The ground plane may include a first ground plane portion extending between a positive terminal of the RF signal path and a negative terminal of the RF signal path. The ground plane may include a second ground plane portion extending between the positive terminal and the negative terminal of the RF signal path. The second ground plane portion may be opposed the first ground plane portion. The capacitor RF shielding structure may also include a patterned shielding layer electrically contacting the first ground plane portion and/or the second ground plane portion. The patterned shielding layer may electrically disconnecting a return current path over the patterned shielding layer to confine a return current to flowing over the first ground plane portion or the second ground plane portion.

On-chip coupling capacitor with patterned radio frequency shielding structure for lower loss

Certain aspects of the present disclosure provide an inductor-enclosed switchable voltage-controlled oscillator (VCO), for use in a frequency synthesizer of a radio frequency integrated circuit (RFIC), for example. One example apparatus is a frequency synthesizer that generally includes a first VCO circuit comprising a first inductor and a second VCO circuit comprising a second inductor, wherein at least a portion of the first VCO circuit is disposed inside a loop of the second inductor. According to certain aspects, at least a portion of the second VCO circuit is disposed inside a loop of the first inductor.

Inductor-enclosed voltage-controlled oscillators

Metal-oxide-metal (MOM) type capacitors include a first terminal configured to receive a first voltage, the first terminal being formed on a first dielectric layer; a first set of fingers formed on the first dielectric layer, the first set of fingers being coupled to the first terminal via a conductive trace formed on a second dielectric layer; a second terminal configured to receive second voltage, the second terminal being formed on the first dielectric layer; and a second set of fingers formed on the first dielectric layer, the second set of fingers being coupled to the second terminal, wherein the fingers of the second set are interspersed with the fingers of the first set.

Metal-oxide-metal (MOM) capacitor with reduced magnetic coupling to neighboring circuit and high series resonance frequency

A tunable guard ring for improved circuit isolation is disclosed. In an exemplary embodiment, an apparatus includes a closed loop guard ring formed on an integrated circuit and magnetically coupled by a selected coupling factor to a first inductor formed on the integrated circuit. The apparatus also includes a tunable capacitor forming a portion of the closed loop guard ring and configured to reduce magnetic field coupling from the first inductor to a second inductor.

Tunable guard ring for improved circuit isolation

Amplifiers with configurable mutually-coupled source degeneration inductors are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes a gain transistor and a plurality of inductors, which may implement an amplifier. The gain transistor receives an input signal and provides an amplified signal. The plurality of inductors are mutually coupled, are coupled to the gain transistor, and provide a programmable source degeneration inductance for the gain transistor. The inductors may have a positive coupling coefficient and may provide a larger source degeneration inductance. Alternatively, the inductors may have a negative coupling coefficient and may provide a smaller source degeneration inductance.

Amplifiers with configurable mutually-coupled source degeneration inductors

A device includes a first and a second low noise amplifier (LNA), a first degenerative inductance coupled between the first LNA and ground by a first ground connection, and a second degenerative inductance coupled between the second LNA and ground by a second ground connection, the first and second degenerative inductances configured to establish negative inductive coupling between the first and second degenerative inductances.

Area-efficient degenerative inductance for a low noise amplifier (LNA)

A wideband frequency generator has two or more oscillators for different frequency bands, disposed on the same die within a flip chip package. Coupling between inductors of the two oscillators is reduced by placing one inductor on the die and the other inductor on the package, separating the inductors by a solder bump diameter. The loosely coupled inductors allow manipulation of the LC tank circuit of one of the oscillators to increase the bandwidth of the other oscillator, and vice versa. Preventing undesirable mode of oscillation in one of the oscillators may be achieved by loading the LC tank circuit of the other oscillator with a large capacitance, such as the entire capacitance of the coarse tuning bank of the other oscillator. Preventing the undesirable mode may also be achieved by decreasing the quality factor of the other oscillator's LC tank and thereby increasing the losses in the tank circuit.

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San Diego, CA, United States of America

Zhang Jin