Samsung Electronics Co., Ltd.

Zhan Ping

Harry Rogers

Fred Worley

Gunneswara Rao Marripudi

Sreenivas Krishnan

Michael Scriber

Vikas Sinha

Stephen Garry Fischer

Qinling Zheng

Indira Joshi

Hongzhong Zheng

Jason Martineau

Chaohong Hu

Robert Brennan

Uksong Kang

Ian P Shaeffer

Matteo Monchiero

A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a host bus interface and a storage interface, and that provides routing, to accommodate a plurality of mass storage devices that may be connected to the storage adapter circuit through the storage motherboard. The storage adapter circuit may be replaced with a circuit supporting a different host interface or a different storage interface.

Multi-protocol IO infrastructure for a flexible storage platform

A system and method for active disturbance rejection based thermal control is configured to receive, at a first active disturbance rejection thermal control (ADRC) controller, a first temperature measurement from a first thermal zone. The ADRC controller generates a first output control signal for controlling a first cooling element, wherein the first output control signal is generated according a first estimated temperature and a first estimated disturbance calculated by a first extended state observer (ESO) of the first ADRC controller.

Active disturbance rejection based thermal control

A storage system with temperature control. The system includes a plurality of storage devices such as solid state drives, a system controller such as a baseboard management controller, and one or more cooling fans. Each storage devices includes a controller configured to estimate the heat load in the storage device and/or an effective temperature, resulting from operations performed in the storage device. The system controller employs active disturbance rejection control to adjust the fan speed based on the estimated heat loads, the estimated temperatures, and/or the sensed internal temperatures, of the storage devices.

Advanced thermal control for SSD

A computing system providing high-availability access to computing resources includes: a plurality of interfaces; a plurality of sets of computing resources, each of the sets of computing resources including a plurality of computing resources; and at least three switches, each of the switches being connected to a corresponding one of the interfaces via a host link and being connected to a corresponding one of the sets of computing resources via a plurality of resource connections, each of the switches being configured such that data traffic is distributed to remaining ones of the switches through a plurality of cross-connections between the switches if one of the switches fails.

Adaptive multipath fabric for balanced performance and high availability

Embodiments of the inventive concept include solid state drive (SSD) multi-card adapters that can include multiple solid state drive cards, which can be incorporated into existing enterprise servers without major architectural changes, thereby enabling the server industry ecosystem to easily integrate evolving solid state drive technologies into servers. The SSD multi-card adapters can include an interface section between various solid state drive cards and drive connector types. The interface section can perform protocol translation, packet switching and routing, data encryption, data compression, management information aggregation, virtualization, and other functions.

Solid state drive multi-card adapter with integrated processing

An assembly for a solid-state drive (SSD) includes a base printed circuit board having a PCIe adapter form factor, and at least one U.2 connector that is capable of being connected to a NGSFF device. The NGSFF device includes an NGSFF PCB, a first PCIe connector and a second PCIe connector. The NGSFF PCB is capable of receiving at least one SSD device and includes a first end and a second end in which the first end is opposite the second end. The first PCIe connector is at an edge of the first end of the NGSFF PCB and is capable of physical insertion into the at least one U.2 connector on the base PCB, and the second PCIe connector is at an edge of the second end of the NGSFF PCB and is capable of receiving a first PCIe connector of another NGSFF PCB.

Modular NGSFF module to meet different density and length requirements

An embodiment includes a memory module, comprising: a module error interface; and a plurality of memory devices, each memory device coupled to the module error interface, including a data interface and an device error interface, and configured to communicate error information through the device error interface and the module error interface.

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Milpitas, CA, United States of America

Zhan Ping