Seiko Epson Corporation

Zenzo Oda

Tsuyoshi Tamura

Toshinori Nakayama

Noriaki Sakurada

Osamu Omori

Tadashi Komiyama

A semiconductor integrated circuit is provided, using a one-port memory cell, capable of smoothly performing a data write/read operation in accordance with an instruction from a CPU and a data read operation to display an image on a display panel. The semiconductor integrated circuit includes a memory cell having a port through which data is input to and output from a set of bit lines, a write/read circuit connected with the port via the set of bit lines, a read circuit connected with the port via the set of bit lines, a CPU-system control circuit that controls the write/read circuit so that a data write or read operation based on a write request or read request from a CPU is performed for a first period, and a display-system control circuit that controls the read circuit so that data to be supplied to a display panel is read for a second period which does not overlap the first period.

Semiconductor integrated circuit

There is provided a display driver incorporating a RAM in which a plurality of memory cells having a three-port configuration can be provided within an interval of output electrodes thereof, and a display unit and an electronic apparatus utilizing the same. The memory cells include a flip-flop comprised of first and second inverters. A first node of the flip-flop is connected to a CPU bit line and an RGB bit line through an N-type MOS transistor. A P-type MOS transistor and an N-type MOS transistor are connected to a second node of the flip-flop. The N-type MOS transistor is connected to a ground potential level at the source terminal thereof. A set signal for each pixel is supplied to the gate terminal of only the flip-flop associated with the pixel to be written, and the set signal sets the second node at the ground potential level.

Display driver and display unit and electronic apparatus utilizing the same

The present invention is a semiconductor device which can improve the adhesive force between a semiconductor chip substrate. This semiconductor device has a semiconductor chip , a die pad (metallic portion) on which the semiconductor chip is fixedly mounted and supported through an adhesive layer , and a sealing resin for sealing the die pad and semiconductor chip . The adhesive layer includes a plurality of conductive adhesive regions and a plurality of insulative adhesive regions together.

Semiconductor device and method for manufacturing the same

An objective of the present invention is to provide a highly reliable IC card which is large in the scale of integration, fast, and low power-consuming, which contains the latest type of IC that has an operating voltage of 3.3 V and a maximum rated voltage of 5 V or less, and which can be used in either the latest equipment rated at 3.3 V or existing equipment rated at 5 V, or which does not cause this latest type of IC to be destroyed. The interface circuit comprises an analog switch, an external interface circuit, an interval interface circuit, and a high-voltage detection circuit. If the voltage of the power supply Vcc of the host system is less than or equal to an upper-limit voltage of 4 V, the power supply voltage is applied unchanged through the analog switch to a ROM that is the main circuit. On the other hand, if the power supply voltage is greater than this upper-limit voltage of 4 V, the analog switch is made non-conductive and thus the power supply voltage is not applied to the ROM. This prevents the ROM from being destroyed. If a regulated-voltage circuit is also provided, a power supply voltage regulated at 3.3 V can be applied to the ROM, even when the power supply voltage of host system is greater than the upper-limit voltage of 4 V.

Growing community of inventors

Chino, Japan

Zenzo Oda