Alcatel Lucent

Alcatel-lucent USA Inc.

Nokia of America Corporation

Yves Baeyens

Shahriar Shahramian

Young-Kai Chen

Noriaki Kaneda

Nagesh R Basavanhally

Andreas Leven

Vincent Etienne Houtsma

Ut-Va Koc

Nils Guenter Weimann

Muriel Gohn

Pascal Roux

A method and architecture for operating with distributed (or segmented) on-chip digital interfaces such as the Inter-Integrated Circuit protocol and a Serial Peripheral Interface protocol. This method and architecture, illustratively, divides the available address space of the digital interface register arrays of a device into one or more segments referred to as a fundamental digital interface circuit. Such segmentation allows for each fundamental digital interface circuit to be placed in proximity of the digitally controlled circuit(s) (e.g., analog circuit(s)) which share some operational connection and for exchanging communication in accordance with a plurality of inputs to the device.

Method and apparatus for a segmented on-chip digital interface block

An apparatus includes a 1&#xd7;2 waveguide-based power divider. The 1&#xd7;2 waveguide-based power divider includes a 1&#xd7;2 waveguide coupler, two primary transmission lines, two three-port waveguide couplers, and a series. The series includes one or more secondary transmission lines. Each primary transmission line connects a corresponding output of the 1&#xd7;2 waveguide coupler to a first port of a corresponding one of the three-port waveguide couplers. The series connects a second ports of the three-port waveguide couplers.

Waveguide power dividers

An apparatus is disclosed configured for receiving a first alternating signal and for transmitting a second alternating signal. A detector is configured to receive a third alternating signal which is a reflection of at least a portion in power of the second alternating signal. The detector is further configured to convert the third alternating signal into a rectified signal and measure the power of said rectified signal. The measured power of the rectified signal is indicative of a power of the reflected third signal.

Technique for monitoring and managing output power

An apparatus includes a dielectric slab having first and opposing second major surfaces. A planar antenna element is located on the first major surface. A via formed through the dielectric slab is conductively connected to the antenna element. A plurality of solder bump pads is located on the second major surface and is configured to attach the dielectric slab to an integrated circuit.

Radiation efficient integrated antenna

At least one example embodiment discloses an antenna system. The antenna system includes a single printed circuit board (PCB) substrate and an antenna integrated with the single PCB substrate, the antenna being a broadside low-profile microstrip antenna.

Broadside antenna systems

The object of the present invention is a low noise figure amplifier with a variable gain which comprises a cascode amplification stage comprising, serially mounted, a low-voltage MOSFET transistor installed as a common source followed by a bipolar transistor with high breakdown voltage installed as a common base. A resistor is placed between the bipolar transistor's collector and the grid of the cascode stage's MOSFET transistor, and the cascode stage is electrically powered through a choke.

Power amplifier with low noise figure and voltage variable gain

An optoelectronic receiver and associated method of operation.

Optoelectronic receiver

An electronic device includes a first strip conductor formed from a first metal level over a substrate. A second strip conductor formed from a second metal level is located between the first strip conductor and the substrate. At least one of the first and the second strip conductors includes a stripline portion and a microstrip line portion.

Growing community of inventors

Stirling, NJ, United States of America

Yves Baeyens