Broadcom Corporation

Yuyu Chang

Hooman Darabi

Arya Behzad

Hung-Ming Chien

John Cumming Leete

Adedayo Ojo

Kishore Rama Rao

Guruprasad Seetharam

Wei Luo

Walid Ahmed

Meng-An Pan

Qiang Li

Morteza Vadipour

Ahmad Yazdi

Zhimin Zhou

Yiannis Kokolakis

According to one embodiment, a radio frequency (RF) transceiver includes a local oscillator generator (LOGEN) circuit configured to receive an adaptive supply voltage. The LOGEN circuit is coupled to a variable power supply for providing the adaptive supply voltage. A process monitor for the LOGEN circuit is in communication with the variable power supply through a power supply programming module. As a result, the adaptive supply voltage can be adjusted according to data supplied by the process monitor. A method for adaptively powering a LOGEN circuit comprises providing power to an RF device, monitoring a process corner of said LOGEN circuit, determining a supply voltage corresponding to the process corner, and adjusting the supply voltage to adaptively power the LOGEN circuit.

Adaptive powered local oscillator generator circuit and related method

Embodiments of a radio frequency (RF) receiver implementing one or more forms of protection to protect devices of the RF receiver from in-band interferers is provided. The RF receiver includes an integrated circuit terminal configured to couple a RF signal received at an antenna to a RF signal path, and a low noise amplifier (LNA) coupled to the RF signal path and configured to amplify the RF signal to provide an amplified RF signal. To protect the LNA from in-band interferers, the RF receiver can further include one or more clamping circuits and/or an over-voltage detector to determine if a peak of the RF signal exceeds an acceptable level.

Low noise amplifier protection using a peak detector

Methods and systems are provided to calibrate an oscillator circuit to reduce frequency pulling as a result of a change in power to a portion of the oscillator circuit. In an embodiment, an oscillator is coupled to a clock buffer circuit and a tuning capacitor configured to tune a frequency of the oscillator to a baseline frequency required for cellular communications. A change in power to the clock buffer circuit initiates a change in an amount of capacitance seen by the oscillator, which negatively impacts the tuning of the oscillator. A register stores a frequency offset caused by the change in power, and the tuning capacitor is adjusted, using the frequency offset, in response to the change in power, such that the total amount of capacitance seen by the oscillator is not changed when the change in power occurs.

Systems and methods for reducing frequency pulling in an oscillator circuit

Aspects of a method and system for processing signals in a high performance receive chain may include amplifying a plurality of radio frequency signals in one or more respective one or ones of a plurality of amplifier chains in a multistandard radio frequency front-end, which may comprise one or more shared processing stages. The plurality of radio frequency signals may be compliant with a plurality of radio frequency communication standards and may be received concurrently. The one or more shared processing stages may be shared between two or more of the plurality of amplifier chains. Each of the two or more of the plurality of amplifier chains may be operable to amplify signals compliant with different radio frequency communication standards.

Method and system for processing signals in a high performance receive chain

Aspects of a method and system for an integrated LC resonant current gain boosting amplifier may include amplifying within a chip, via an on-chip LC current gain circuit, an alternating current (AC) generated by an on-chip voltage-to-current converter, and converting within the chip, via an on-chip current-to-voltage circuit; the amplified alternating current to an output voltage. The on-chip LC current gain circuit comprises only passive components, which may include one or more resistors, one or more capacitors, and one or more inductors.

Method and system for an LC resonant current gain boosting amplifier

Fully integrated compact cross-coupled low noise amplifier. A circuitry implementation that includes two pairs of metal oxide semiconductor field-effect transistors (MOSFETs) (either N-type of P-type) operates as an LNA, which can be used within any of a wide variety of communication devices. A majority of the elements are integrated within the design and need not be implemented off-chip, and this can provide for a reduction in area required by the circuitry. A differential 100&#x3a9; input impedance is provided by this design. A higher than typical power supply voltage can be employed (if desired) to accommodate one possible implementation that includes two parallel implemented resistors to ground.

Fully integrated compact cross-coupled low noise amplifier

Low noise amplifier protection using a clamping device

Embodiments of the present invention provide DC biasing circuits. Embodiments employ an open loop scheme, instead of a closed loop scheme as used in conventional circuits. In addition, embodiments generate a DC bias voltage that is independent of temperature, process, and power supply variations. Further, embodiments require low amounts of power and silicon.

Constant output DC bias circuit using an open loop scheme

A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power voltage reference for low-power mode and to a low-noise voltage reference for low-noise mode. The LDO provides a constant voltage output to a crystal oscillator. A clock signal is generated using the crystal oscillator. The clock signal is limited using a low-power limiter to generate a low-power output clock signal and/or is limited using a low-noise limiter to generate a low-noise clock signal. The low-power output clock signal or the low-noise output clock signal is selected using a mux.

Configurable clock signal generator

Aspects of a method and system for a transformer-based high performance cross-coupled low noise amplifier may include one or more circuits that integrate within a single chip, a balun with a low-noise amplifier. A DC current biasing path for the low-noise amplifier may be provided through the integrated balun. The low-noise amplifier may be configured as a cross-coupled low-noise amplifier, where the balun may be directly coupled to the cross-coupled low-noise amplifier. The balun may comprise two or more inductors, wherein one or more of the inductors may provide an electrical path for allowing a DC bias current to flow to ground. Integrating a balun on a single chip with a low-noise amplifier may allow the use of a single received signal input terminal. The biasing voltage may be selected to optimize performance of the low-noise amplifier.

Method and system for a transformer-based high performance cross-coupled low noise amplifier

Cross-coupled low noise amplifier for cellular applications. A circuitry implementation that includes two pairs of metal oxide semiconductor field-effect transistors (MOSFETs) (either N-type of P-type) operates as an LNA, which can be used within any of a wide variety of communication devices. In one embodiment, this design is particularly adaptable to cellular telephone applications. A majority of the elements are integrated within the design and need not be implemented off-chip, and this can provide for a reduction in area required by the circuitry. A very high output impedance is provided by using two transistors (implemented in a triple well configuration) with resistive source degeneration. A higher than typical power supply voltage can be employed (if desired) to accommodate the voltage drops of the resistors and transistors.

Cross-coupled low noise amplifier for cellular applications

Aspects of a method and system for processing signals in a high performance receive chain may include amplifying radio frequency signals in amplifier chains in a multistandard radio frequency front-end, comprising one or more shared processing stages, and combining, with substantially equal gain, a number of phase-shifted radio frequency signals of the radio frequency signals into substantially equal-gain-combined radio frequency signals. The substantially equal-gain-combined radio frequency signals may be demodulated to obtain inphase channels and quadrature channels. A number of inphase channels and quadrature channels may be processed in I-channel processing blocks and Q-channel processing blocks to generate an output analog baseband signal. The multistandard radio frequency front-end may be capable of processing Bluetooth&#xae; signals and Wireless Local Area Network (WLAN) signals. The amplifier chains may comprise a first amplifier and a second amplifier, where the first amplifier may be shared between Bluetooth&#xae; signal processing paths and WLAN signal processing paths.

A frequency tuning device for use in a crystal oscillator circuit includes a first fine tuning array of capacitors, a second fine tuning array of capacitors and a coarse tuning array of capacitors coupled in parallel to produce a tuning capacitance for tuning the crystal oscillator. The first fine tuning array of capacitors includes a binary weighted switched capacitor network, the second fine tuning array of capacitors includes a thermometer coded switched capacitor network and the coarse tuning array of capacitors includes a binary weighted switched capacitor network with a different unit capacitance value than the first and second fine tuning arrays.

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Irvine, CA, United States of America

Yuyu Chang