Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Yuya Maeda

Nobuyoshi Saito

Shintaro Nakano

Kentaro Miura

Tomomasa Ueda

Hajime Yamaguchi

Tatsunori Sakano

Hidenori Miyagawa

Masaki Atsuta

Tomio Ono

Shigeya Kimura

Keiji Ikeda

Tsutomu Tezuka

Jumpei Tajima

A semiconductor memory device includes conductive layers and insulation layers alternately stacked along a first direction. A core member extends through the insulation layers and conductive layers. A semiconductor layer on an outer periphery of the core member has a first region facing a conductive layer of the stack and a second region adjacent to the first region and facing an insulation layer. The first region has a first thickness and a first impurity concentration. The second region has a second thickness that is greater than the first thickness and a second impurity concentration that is different from the first impurity concentration. A charge accumulation film is between the semiconductor layer and the conductive layer in a second direction crossing the first direction.

Semiconductor memory device having a multi-region semiconductor layer

A semiconductor memory device, including: a substrate; a plurality of first conductive layers arranged in a first direction intersecting a surface of the substrate; a channel semiconductor layer extending in the first direction and including a first portion facing the plurality of the first conductive layers and a second portion further from the substrate than the first portion; a memory layer arranged between the first portion of the channel semiconductor layer and the plurality of the first conductive layers and including a memory part capable of storing data; and a first semiconductor layer connected to the second portion of the channel semiconductor layer, the first semiconductor layer including crystalline semiconductor containing a first impurity, and the channel semiconductor layer including a crystal grain having a crystal grain size larger than a thickness thereof.

Semiconductor memory device

According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer. The third semiconductor is provided between the first semiconductor layer and the second semiconductor layer. A first transistor includes a first gate electrode and a first amorphous semiconductor layer. The first gate electrode and the first amorphous semiconductor layer overlap in a first direction. The first direction is from the first semiconductor layer toward the second semiconductor layer. The first gate electrode is provided between the second semiconductor layer and the first amorphous semiconductor layer.

Semiconductor light emitting device

According to one embodiment, an oxide semiconductor includes indium, gallium, and silicon. A concentration of the silicon in the oxide semiconductor is not less than 7 atomic percent and not more than 11 atomic percent.

Oxide semiconductor and semiconductor device

According to one embodiment, a semiconductor device includes an oxide semiconductor transistor. The oxide semiconductor transistor includes a semiconductor layer including an oxide semiconductor, the semiconductor layer including a source region and a source electrode. The source electrode includes a source conductive layer including copper, a first tantalum-containing region provided between the source conductive layer and the source region, the first tantalum-containing region including tantalum, a first low nitrogen composition region provided between the first tantalum-containing region and the source region, the first low nitrogen composition region including TaN(0&#x3c;x1&#x3c;0.5), and a first high nitrogen composition region provided between the first low nitrogen composition region and the source region, the first high nitrogen composition region including TaN(0.5&#x2266;x2&#x3c;1).

Semiconductor device and method for manufacturing same

According to one embodiment, a method for manufacturing a display element is disclosed. The method can include forming a peeling layer, forming a resin layer, forming a barrier layer, forming an interconnect layer, forming a display layer, and removing. The peeling layer is formed on a major surface of a base body. The major surface has first, second, and third regions. The peeling layer includes first, second, and third peeling portions. The resin layer is formed on the peeling layer. The resin layer includes first and second resin portions. The barrier layer is formed on the first, second, and third peeling portions. The interconnect layer is formed on the barrier layer. The display layer is formed on the interconnect layer. The first peeling portion is removed from the first resin portion and the second peeling portion is removed from the second resin portion.

Method for manufacturing display element, display element, and display device

According to one embodiment, a semiconductor device includes a semiconductor layer including a first semiconductor portion and a second semiconductor portion being continuous with the first semiconductor portion, a first gate electrode, a second gate electrode, an insulating film. The first semiconductor portion includes a first portion, a second portion and a third portion provided between the first portion and the second portion. The second semiconductor portion includes a fourth portion separated from the first portion, a fifth portion separated from the second portion, and a sixth portion provided between the forth portion and the fifth portion. The first gate electrode is separated from the third portion. The second gate electrode is separated from the sixth portion. The insulating film is provided at a first position between the first gate electrode and the semiconductor layer and at a second position between the second gate electrode and the semiconductor layer.

Semiconductor device and imaging device

A semiconductor element includes a semiconductor layer, a first and a second conductive unit, a gate electrode, and a gate insulating film. The semiconductor layer includes a first portion, a second portion, and a third portion provided between the first portion and the second portion. The first conductive unit is electrically connected to the first portion. The second conductive unit is electrically connected to the second portion. The gate electrode is separated from the first conductive unit, the second conductive unit, and the third portion. The gate electrode opposes the third portion. The gate insulating film is provided between the third portion and the gate electrode. A concentration of nitrogen of the first portion is higher than a concentration of nitrogen of the third portion. A concentration of nitrogen of the second portion is higher than the concentration of nitrogen of the third portion.

Semiconductor element, display device, method for manufacturing semiconductor element, and method for manufacturing display device

According to one embodiment, a thin film transistor includes a first insulating film, a gate electrode, a semiconductor layer, a gate insulator film, a second insulating film, a source electrode, a tunneling insulating portion, and a drain electrode. The semiconductor layer is provided between the gate electrode and the first insulating film, and includes an amorphous oxide. The gate insulator film is provided between the semiconductor layer and the gate electrode. The second insulating film is provided between the semiconductor layer and the first insulating film. The tunneling insulating portion is provided between the semiconductor layer and the source electrode, and between the semiconductor layer and the drain electrode, and between the first insulating film and the second insulating film. The tunneling insulating portion includes oxygen and at least one selected from aluminum and magnesium. A thickness of the tunneling insulating portion is 2 nanometers or less.

Thin film transistor and method for manufacturing same

According to one embodiment, a display device includes a substrate unit, a thin film transistor, a pixel electrode and a display layer. The substrate unit includes a substrate, a first insulating layer provided on the substrate, and a second insulating layer provided on the first insulating layer. The thin film transistor is provided on the substrate unit and includes a gate electrode provided on the second insulating layer, a semiconductor layer of an oxide separated from the gate electrode, a gate insulation layer provided between the gate electrode and the semiconductor layer, a first conductive portion, a second conductive portion, and a third insulating layer. The pixel electrode is connected to one selected from the first and second conductive portions. The display layer is configured to have a light emission or a change of optical characteristic occurring according to a charge supplied to the pixel electrode.

Display device, thin film transistor, method for manufacturing display device, and method for manufacturing thin film transistor

A display device includes a first electrode, a second electrode, an organic light emitting layer, a first transistor, and a second transistor. The first transistor includes a first semiconductor layer, a first conductive unit, a second conductive unit, a first gate electrode, and a first gate insulating film. The second transistor includes a second semiconductor layer, a third conductive unit, a fourth conductive unit, a second gate electrode, and a second gate insulating film. An amount of hydrogen included in the first gate insulating film is larger than an amount of hydrogen included in the second gate insulating film.

Growing community of inventors

Kawasaki, Japan

Yuya Maeda