Western Digital Technologies, Inc.

Sandisk Technologies Inc.

3com Corporation

General Signal Corporation

Openpeak Inc.

Chipcom Corporation

Mintera Corporation

Yuval Shohet

Sergey Anatolievich Gorobets

Alan David Bennett

Liam Michael Parker

Michelle Martin

Brian Ramelson

Yoseph Linde

David E Bartolini

Gordon C Saussy

John L Cook, Iii

Menachem Abraham

Samuel Ben-Meir

Ilan Carmi

Richard Rehberg

Yongbum Kim

Steven E Horowitz

Alex Herman

Ira Hart

Igor Zhovnirovski

Pavel V Mamyshev

Benny P Mikkelsen

Myles Kimmitt

Kent Springer

Teerapat Theerawong

Tina Fjelde

John E Kaufmann

The present disclosure generally relates to improving programming to data storage devices, such as solid state drives (SSDs). A first memory device has a first XOR element and a second memory device has a second XOR element. The ratio of the first XOR element to the capacity of the first memory device is substantially smaller than the ratio of the second XOR element to the capacity of the second memory device. A read verify operation to find program failures is executed on either a wordline to wordline basis, an erase block to erase block basis, or both a wordline to wordline basis and an erase block to erase block basis. Because the program failures are found and fixed prior to programming to the second memory device, the second XOR element may be decreased substantially.

TLC data programming with hybrid parity

A data storage device includes one or more memory devices that each includes one or more superblocks and a controller coupled to the one or more memory devices. Each superblock includes a plurality of wordlines. The controller is configured to write data to a first wordline of the plurality of wordlines, write data to a second wordline of the plurality of wordlines, perform a read verify operation on the first wordline, and perform a read verify operation on the second wordline. At least one of the first wordline and the second wordline does not include an XOR parity element and one or more wordlines of the plurality of wordlines includes the XOR parity element.

QLC data programming

An electronic device includes a housing, a printed circuit board, a first heat sink and a second heat sink. The printed circuit board is disposed internal to the housing and supports at least one integrated circuit (IC) chip. The first heat sink is also disposed internal to the housing and is thermally connected to the at least one IC chip. The second heat sink is connected to the housing such that at least a portion thereof is externally disposed to the housing. The second heat sink is thermally connected to the first heat sink via an aperture in the housing.

Telephony and digital media services device

In an optical transmitter, continuous wave light from a laser passes through a data modulator (DM) for non-return-to-zero (NRZ) encoding of a data stream and through a pulse modulator to add return-to-zero encoding to the modulated optical signal. A modulator controller monitors the output optical signal power, optimizes the bias setting for the DM and the PM, and optimizes the phase relationship between the pulse and data components of the modulated optical signal. For each optimization, a low amplitude and low frequency dither signal is injected at appropriate points in the modulator. A single photo detector and electrical receiver are used in a multiplexed fashion to monitor the optical output signal and derive separate feedback signals. Remaining control circuitry forces a null in a respective residual dither component in the optical output signal to maintain the desired bias level or phase alignment.

Control of an optical modulator for desired biasing of data and pulse modulators

A local net area network, or LAN, configuration is provided with a multiple generic LAN channel architecture which can be logically and dynamically changed. The configuration control can be applied to each module of the network and to each port of a module of a LAN hub. The architecture provides multiple LAN protocols to be used simultaneously, as needed, through protocol specific functions. Industry standard protocol such as: token bus, token ring, and fiber distributed data interface (FDDI), can be implemented using the generic channel architecture and its characteristics providing respective network functions. The architecture also provides a digital collision detection method and provides information necessary for precise network statistics monitoring. The token passing ring architecture provides a logical ring formation within the generic channel. A token passing bus architecture uses modified Ethernet.TM. architecture, and a hub management provides control for the generic multichannel and the LAN management provides protocol dependent network management. The architecture provided allows multiple hub management entities via hub mastership arbitration to provide a unique master for the hub management function.

Generic backplane system which is configurable to serve different

Communication system concentrator configurable to different access

Jitter is measured by applying a first clock signal to a device-under-test, measuring the phase difference between the jittered clock signal received from the device-under-test and a reference clock signal, and converting the phase difference to a jitter measurement. The phase difference is measured by counting the number of high frequency clock pulses between a transition of the jittered clock signal and a transition of the reference clock signal. The phase difference is converted to a jitter measurement by determining the highest and lowest phase difference count and taking the difference between the highest and lowest count. The phase of the reference clock signal can be adjusted as a function of the highest and lowest count by determined the mean value of the highest and lowest count and adjusting the reference clock to be of this mean value. The range of the jitter measurement can be adjusted by adjusting the frequency of high frequency clock to the counter, the jittered signal received from the device-under-test and the reference clock signal.

Jitter measurement device

Growing community of inventors

Acton, MA, United States of America

Yuval Shohet