Cisco Technology, Inc.

Microsoft Technology Licensing, LLC

Yuval Bachar

Gopakumar Parameswaran

Eric Wendorf

Jacob R Rose

Michael Grobman

Mark N Yamashita

Brad A Peterson

Cuong C Ly

Douglas L Yanagawa

A flexible architecture for installing electronic equipment in a data center rack is provided, in the form of a virtual chassis. The virtual chassis simultaneously accepts multiple types of equipment items (e.g., computing devices, storage devices, communication devices) and/or multiple versions of a given type of equipment item, by altering the physical configuration of the chassis. As a result, cells or spaces of multiple different form-factors may be defined for receiving the equipment. Also, services such as data and power may be pre-attached to a virtual chassis so that when a computer server or other item is installed, it is automatically connected to the services without separate effort. One or more electronic equipment items, when installed in a cell of the chassis, may mate automatically with multiple data connectors and/or power connectors.

Flexible chassis for installing electronic equipment in a rack

A method and apparatus for shaping signals transmitted via plated through holes (PTHs) utilizes standard back-drilling techniques to reduce the resonant stub lengths of ground PTHs in the vicinity of a back-drilled signal PTH.

Apertures for signal shaping using ground and signal PTH back-drilling

Two pairs of vias are arranged in a printed circuit board. A first pair of vias, which conveys a first signal pair, is arranged in a plane that is substantially equidistant from the vias in a second pair of vias, which conveys a second signal pair. Similarly, the second pair of vias is located in a plane that is substantially equidistant from each via in the first pair of vias. In some embodiments, such an arrangement reduces the crosstalk effect of the first signal pair on the second signal pair and vice versa.

System and method for reducing crosstalk between vias in a printed circuit board

An ultra-fast crosstalk cancellation technique characterizes crosstalk with a sample set representing NEXT generated by a single transmitted bit. During operation, transmit bit values of transmitted bits are saved in a transmit bit shift register and used to weight crosstalk samples corresponding to a stored transmit value. The weighted transmit samples are summed to generate a crosstalk cancellation signal which is subtracted from a received signal to remove NEXT.

Ultra high speed crosstalk cancelling technique

A system and method for interleaving symbols to facilitate compatibility between serializer/deserializer (SerDes) units operating at different data rates multiplexes duplicates of a parallel data stream into a fast data rate serial data stream to form a serial data steam at a psuedo-slow data rate which can be received by a SerDes unit operating at the slow data rate. The psuedo-slow data rate serial data stream can also be received by a SerDes operating at the fast data rate by sampling each bit multiple times and demultiplexing the samples into duplicates of the parallel data stream.

Apparatus and method for SerDes rate matching using symbol interleaving

A device and procedure for associating an identifier with each of a plurality of slave units in a master slave system is provided. In one aspect, a master outputs a signal on a multi-line bus with a single, preferably lowest-numbered, line pulled-up and the remaining lines pulled-down. A first slave in a daisy chain communication architecture, in response to the pull-up of the bus wire configures itself with the lowest-numbered slave number, preferably so as to respond to a lowest-numbered com line. The first slave unit then outputs, to the next slave unit, a signal on the multi-line bus with the next-higher numbered line pulled-up and all other lines pulled-down. In response, the second slave unit will configure itself with the second-lowest slave identifier number such as configuring itself to respond to the second-lowest com line, and so forth. The system can be implemented to eliminate the need for slave addressing and can be implemented with relatively few components in a low cost and non-complex fashion.

Multi drop stack bus detector method and apparatus

A system and method are disclosed for transmitting signals from a digital MAC interface to a bus and for transmitting signals from a bus to a digital MAC interface. A first bus data line is modulated by holding the first bus data line at a potential when the transmit data line is in a first state and allowing the first bus data line to float when the transmit data line is in a second state when data transmission from the digital MAC interface is enabled. A second bus data line is modulated by holding the second bus data line at a potential when the transmit data line is in the second state and by allowing the second bus data line to float when the transmit data line is in the first state. One of the bus data lines are connected to a receive data line on the digital MAC interface. The state of the first data line is compared to the state of the second data line the collision line is set to a fist preselected state when the state of the first data line and the state of the second data line are both a second preselected state.

Growing community of inventors

Sunnyvale, CA, United States of America

Yuval Bachar