Kioxia Corporation

Toshiba Memory Corporation

Yuuta Sano

Junichi Sato

A semiconductor storage device includes a memory cell array, and a peripheral circuit that is connected to the memory cell array, and that inputs and outputs user data in response to an input of a command set including command data and address data. The peripheral circuit includes a command register, an address register, and a queue register. The command register includes an n-bit first register column capable of storing n-bit data forming the command data. The address register includes an n-bit second register column capable of storing n-bit data forming the address data. The queue register includes a plurality of third register columns, each capable of storing at least (n+1) bit data, and each third register column is capable of storing the n-bit data forming the command data or the n-bit data forming the address data.

Semiconductor storage device

A semiconductor memory device includes: a memory cell array; a peripheral circuit connected to this memory cell array, the peripheral circuit outputting data in the memory cell array as a read data in response to input of a command set, the command set including a first command, address data, and a second command; a first electrode capable of being used in input of the command set and output of the read data; and a second electrode capable of supplying electric power to the peripheral circuit. A current flowing in the second electrode at a second timing is larger than a current flowing in the second electrode at a first timing, the first timing being a timing at which the first command is inputted, the second timing being a timing before which the input of the address data is started and after which an input of the second command is finished.

Growing community of inventors

Yokosuka, Japan

Yuuta Sano