Sony Corporation

Yuuji Nishitani

Hiroyuki Shigeta

Kosuke Hareyama

Daisuke Chino

This semiconductor chip package has opposed first surface and second surface, and includes a semiconductor chip having a circuit part and an electrode for supplying a voltage to the circuit part, a resin layer formed in a periphery of the semiconductor chip, a substrate that is disposed to face the first surface of the semiconductor chip and the resin layer, and a plurality of external terminals that are provided on the second surface of the semiconductor chip, each of the plurality of external terminals being electrically coupled to any of the plurality of electrodes.

Semiconductor chip package for improving freedom of arrangement of external terminals

A semiconductor device including a plurality of solder balls on a surface the semiconductor device, and a retaining body associated with a first solder ball of the plurality of solder balls, separating the first solder ball from at least a second solder ball of the plurality of solder balls. The retaining body includes a conductive portion and an insulating portion configured to cover the conductive portion. Also, a method of manufacturing a semiconductor device, including acts of forming a plurality of retaining bodies on a surface of a wiring substrate, each retaining body comprising a conductive portion and an insulating portion covering the conductive portion, each retaining body forming an opening section, and forming a solder ball in the opening section formed by each of the retaining bodies.

Growing community of inventors

Kanagawa, Japan

Yuuji Nishitani