Denso Corporation

Nippondenso Co., Ltd.

University of Cambridge

Yuuichi Takeuchi

Rajesh Kumar Malhan

Tsunenobu Kimoto

Mitsuhiro Kataoka

Hiroyuki Matsunami

Norihito Tokura

Masami Naito

Rajesh Kumar

Naohiro Sugiyama

Tsuyoshi Yamamoto

Eiichi Okuno

Toshimasa Yamamoto

Shigeki Takahashi

Takeshi Miyajima

Takeshi Endo

Kazukuni Hara

Naohiro Suzuki

Atsuya Akiba

Masatake Nagaya

Jeremy Rashid

Katsuhiro Nagata

Takeshi Endou

A wide band gap semiconductor device having a JFET, a MESFET, or a MOSFET mainly includes a semiconductor substrate, a first conductivity type semiconductor layer, and a first conductivity type channel layer. The semiconductor layer is formed on a main surface of the substrate. A recess is formed in the semiconductor layer in such a manner that the semiconductor layer is divided into a source region and a drain region. The recess has a bottom defined by the main surface of the substrate and a side wall defined by the semiconductor layer. The channel layer has an impurity concentration lower than an impurity concentration of the semiconductor layer. The channel layer is formed on the bottom and the side wall of the recess by epitaxial growth.

Semiconductor device and method of manufacturing the same

A silicon carbide semiconductor device having a JFET or a MOSFET includes a semiconductor substrate and a trench. The semiconductor substrate has a silicon carbide substrate, a drift layer on the silicon carbide substrate, a first gate region on the drift layer, and a source region on the first gate region. The trench has a strip shape with a longitudinal direction and reaches the drift layer by penetrating the source region and the first gate region. The trench is filled with a channel layer and a second gate region on the channel layer. The source region is not located at an end portion of the trench in the longitudinal direction.

Silicon carbide semiconductor device and method of manufacturing the same

A silicon carbide (SiC) substrate is provided with an off-oriented {0001} surface whose off-axis direction is &#x3c;11-20&#x3e;. A trench is formed on the SiC to have a stripe structure extending toward a &#x3c;11-20&#x3e; direction. An SiC epitaxial layer is formed on an inside surface of the trench.

Silicon carbide semiconductor device

A wide band gap semiconductor device has a transistor cell region, a diode forming region, an electric field relaxation region located between the transistor cell region and the diode forming region, and an outer peripheral region surrounding the transistor cell region and the diode forming region. In the transistor cell region, a junction field effect transistor is disposed. In the diode forming region, a diode is disposed. In the electric field relaxation region, an isolating part is provided. The isolating part includes a trench dividing the transistor cell region and the diode forming region, a first conductivity-type layer disposed on an inner wall of the trench, and a second conductivity-type layer disposed on a surface of the first conductivity-type layer so as to fill the trench. The first conductivity-type layer and the second conductivity-type layer provide a PN junction.

Wide band gap semiconductor device including junction field effect transistor

In a method of manufacturing a silicon carbide semiconductor device, a trench and a thickness measurement section are formed in a surface of a semiconductor substrate made of silicon carbide. The thickness measurement section includes a plurality of grooves and a protruding portion provided between the grooves so as to have a predetermined width. When an epitaxial layer made of silicon carbide is grown, a thickness of the epitaxial layer formed on the surface of the semiconductor substrate is measured by calculating a difference in height between a surface of the epitaxial layer formed on a portion of the surface of the semiconductor substrate different from the thickness measurement section and a top surface of the protruding portion. The predetermined width is less than a surface migration amount of atoms during growth of the epitaxial layer.

Method of manufacturing silicon carbide semiconductor device

An SiC semiconductor device and a related manufacturing method are disclosed having a structure provided with a p-type deep layer formed in a depth equal to or greater than that of a trench to cause a depletion layer between at a PN junction between the p-type deep layer and an n-type drift layer to extend into the n-type drift layer in a remarkable length, making it difficult for a high voltage, resulting from an adverse affect arising from a drain voltage, to enter a gate oxide film. This results in a capability of minimizing an electric field concentration in the gate oxide film, i.e., an electric field concentration occurring at the gate oxide film at a bottom wall of the trench.

Silicon carbide semiconductor device and related manufacturing method

A method for manufacturing a silicon carbide semiconductor apparatus is disclosed. According to the method, an element structure is formed on a front surface side of a semiconductor substrate. A rear surface of the semiconductor substrate is grinded or polished in a direction parallel to a flat surface of a table. A front surface of the semiconductor substrate is grinded and polished in a direction parallel to the rear surface after the rear surface of the semiconductor substrate is grinded or polished.

Method for manufacturing silicon carbide semiconductor apparatus

A method for manufacturing a silicon carbide semiconductor device includes the steps of: forming a trench mask on an upper surface of a semiconductor substrate; forming the trench such that the trench having an aspect ratio equal to or larger than 2 and having a trench slanting angle equal to or larger than 80 degrees is formed; and removing a damage portion in such a manner that the damage portion disposed on an inner surface of the trench formed in the semiconductor substrate in the step of forming the trench is etched and removed in hydrogen atmosphere under decompression pressure at a temperature equal to or higher than 1600&#xb0; C.

Method for manufacturing semiconductor device having trench in silicon carbide semiconductor substrate

An insulating film () is formed on a semiconductor substrate () formed of silicon carbide. A contact hole () is formed in the insulating film () to expose a part of the upper surface of the semiconductor substrate (). Then, nickel (Ni) (') is formed above the semiconductor substrate (). Subsequently, the semiconductor substrate () is subjected to a heat treatment, whereby the contact portion of nickel (&#x2032;) chemically bonds with the semiconductor substrate () to become an alloy layer () of silicon carbide and nickel. Nickel (&#x2032;) on the insulating film () is selectively removed by etching liquid for dissolving the nickel.

A groove is formed on the surface of a semiconductor substrate composed of silicon carbide and a first thermal oxidation film is formed by executing thermal oxidation on a damaged layer of groove inner walls. Then, the first thermal oxidation film is removed so that the damaged layer can be removed. Since a second thermal oxidation film is formed after the damaged layer is removed, the second thermal oxidation film is uniform. A silicon carbide semiconductor device can be achieved with less side etching because substantially a (0001) carbon face of a cubic system is chosen as the plane orientation of the semiconductor substrate.

Method of manufacturing SiC semiconductor device having double oxide

A manufacturing method for a semiconductor device, which can attain a low ion voltage in a manufacturing method for a semiconductor device involving a process for forming a groove by etching prior to selective oxidation, selectively oxidizing a region including the groove and thereby making a channel part of the groove, is disclosed. A groove part is thermally oxidized by using a silicon nitride film as a mask. A LOCOS oxide film is formed by this thermal oxidation, and concurrently a U-groove is formed on the surface of an n.sup.- -type epitaxial layer eroded by the LOCOS oxide film, and the shape of the U-groove is fixed. A curve part formed during a chemical dry etching process remains as a curve part on the side surface of the U-groove. Then, an n.sup.+ -type source layer is formed by means of thermal diffusion to a junction thickness of 0.5 to 1 .mu.m, and a channel is set up as well. The junction depth obtained by this thermal diffusion is set up more deeply than the curve part which is formed during the above etching and remains on the side surface of the U-groove after the above selective thermal oxidation.

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Obu, Japan

Yuuichi Takeuchi