Nec Corporation

Nippon Steel Sumitomo Metal Corporation

Nec Research Institute, Inc.

Nippon Steel Corporation

Yutaka Wakasu

Matthew Lynn Miller

Kazuyoshi Tanaka

Ingemar J Cox

Chihiro Uematsu

Yuichiro Yamamoto

Taizo Makino

Tatsuro Honda

Naomitsu Mizui

Yukiteru Takeshita

Koh Matsushima

Shinobu Satoh

Kiyonobu Sugae

Matthew L Miller

Takayuki Kamimura

A surface temperature measuring apparatus comprising a radiation thermometer configured to detect thermal radiation light emitted from a surface of a temperature measurement target material in a cooling process with water, a housing having an opening on a temperature measurement target material side, the housing storing, in an inside of the housing, at least a light receiving unit of the radiation thermometer among structural elements of the radiation thermometer, and an optical glass that is fit and sealed in the inside of the housing between the temperature measurement target material and the light receiving unit of the radiation thermometer, the optical glass being configured to transmit the thermal radiation light. The optical glass has, on the temperature measurement target material side, an end surface adjacent to the surface of the temperature measurement target material. A surface temperature measuring method is also provided.

Surface temperature measuring apparatus and surface temperature measuring method

The invention provides an identification data insertion and detection system for digital data which improves the detection ratio when an image is converted into frequency components and electronic watermark data are embedded in a portion of an image having a strong frequency component and besides allows a statistical similarly to be calculated with a higher degree of accuracy. The identification data insertion system for digital data includes a DCT calculator for extracting blocks of 8&times;8 pixels from within a current image and performing DCT (discrete cosine transform) calculation for the blocks, a quantizer for quantizing data outputted from the DCT calculator, a quantization table for being referred to when the quantizer performs quantization, an electronic watermark data insertion element for inserting electronic watermark data into data after quantization, and an encoder for encoding data outputted from the electronic watermark data insertion element to produce MPEG data in which the electronic watermark data are inserted and outputting the MPEG data.

Identification data insertion and detection system for digital data

An image is divided into blocks, and different electronic watermark data are embedded into every block using a DCT transformer (,), electronic watermark data inserter (,), and IDCT transformer (,). At that time, reference is made to an electronic watermark data insertion position table (,) and electronic watermark data table (,) which specify that which electronic watermark data is to be inserted into which block of the image.

Method for inserting and detecting electronic watermark data into a digital image and a device for the same

A digital data encode system for inserting water mark data into digital data signals having a series of field data by use of a water mark data inserting device, the digital data encode system has a field judging unit dividing the digital data signals by a predetermined reference, a water mark data selection output unit for selecting proper one of a plurality of different water mark data prepared correspondingly to the division according to the judgment result of the field judging unit, and a water mark data inserting device for inserting the water mark data supplied from the water mark data selection output unit into the digital data signals.

Digital data encode system

Digital watermarking of data, including image, video and audio data, is performed by repeatedly inserting the watermark into subregions or subimages of the data. Similarly, the watermark is repeatedly extracted from the subregions of the data.

Digital watermarking

In order to realize a high-speed bit-built processing for superimposing pixel data of an image on to a video-memory, only substantial pixel data having color values different from a designated transparent color of a line of the image are stored in a line buffer (109) together with offset values of .chi.-addresses in the line of the substantial pixel data stored in a offset buffer (110). A memory controller (111) reads out the substantial pixel data from the line buffer in order, and writes them in a video memory (112) at a line according to writing addresses calculated by a writing address generator (106) referring to the offset values stored in the offset buffer corresponding to the substantial pixel data.

Graphic processor and a bit-built method applied therein

A three-dimensional computer graphic controller comprises a resistor for receiving information about the triangle, a Y-coordinate counter for fetching the stored information from the resistor and computing Y-coordinates of the triangle, an X-coordinate initial position adder for fetching an information about the first edge of the triangle from the resistor and computing an X-coordinate value of an initial position of the first edge, an X-coordinate width adder for fetching the information about the divided upper and lower triangles and computing individual widths of the triangle on the X-coordinate as well as for changing a variation in width on the X-coordinate between the divided upper and lower triangles, a color component adder for fetching the information about the triangle and individually computing red, green and blue components of the color of the triangle, a frame memory controller for fetching the Y-coordinates, the X-coordinate value of the start position and the individual widths triangle on the X-coordinate to control storing the same into a frame memory, and a line buffer with a capacity corresponding to a line for fetching the red, green and blue components from the color component adder and storing the same.

Three-dimensional graphic controller

In order to write data flowing in continuously into an image memory consisting of a single port RAM without lack and to read data out of the image memory continuously without lack in parallel, a memory access processor of the invention comprises;

Memory access controller

An image memory control device is disclosed by which high speed reading processing can be performed without causing a CPU of a computer to have a waiting time and without expanding the system scale. When the CPU tries to perform read access to an image memory, a CPU read mode signal is changed over and a first-in first-out memory controller delivers a read access request to a memory access controller irrespective of presence or absence of read access, and data read in from the image memory are stored into a FIFO memory under the control of the memory controller. Upon read accessing from the computer, the data are transferred from the first-in first-out memory, which assures higher speed operation. Where writing of video data and read/write access of the computer to the image memory are performed by a same system, the FIFO memory is used as a common buffer to them in a time dividing condition by changing over between them.

Image memory control device

An image compression and decompression apparatus wherein the scale of a required frame memory is reduced to allow reduction of the circuit scale is disclosed. The image compression and decompression apparatus comprises first and second frame memories each of which is used as, upon compression processing, a pre-frame memory for storing digital image data before compression but as, upon decompression processing, a post-frame memory for storing digital image data after decompression. First and second compressed image memories are each used as, upon compression processing, a transmission buffer for storing data after compression but as, upon decompression processing, a reception buffer for storing data before decompression. Each of the two kinds of memories is constructed in a double buffer structure. Control of two kinds of memory controllers for controlling accessing to the two kinds of memories, compression and decompression processing, and sequence control are effected using a program.

Growing community of inventors

Tokyo, Japan

Yutaka Wakasu