Sony Semiconductor Solutions Corporation

Yutaka Takagi

Katsuyuki Tanaka

Naoki Yoshimochi

Yasushi Katayama

Hideki Takahashi

Katsumi Takaoka

Hideki Awata

Nobuo Namekawa

Suguru Houchi

Toshimasa Shimizu

Sotaro Ohara

Keita Izumi

Gaku Hidai

An audio signal synchronization control device of the present disclosure includes a host controller, a plurality of audio devices, a communication unit capable of performing broadcast communication for controlling the plurality of audio devices from the host controller, and a clock oscillator that supplies a master clock of the same source oscillation to the plurality of audio devices. The host controller performs broadcast communication with a plurality of audio devices using a synchronization address. Each of the plurality of audio devices includes a synchronization control unit that generates a synchronization reset signal in a case where broadcast communication is performed by a synchronization address, a clock reset control unit that generates a timing signal in response to the synchronization reset signal, and an audio signal processing unit that processes audio data in accordance with the timing signal.

Audio signal synchronization control device and audio device

The present disclosure relates to a signal processing apparatus and method that enables to reduce required power. In the signal processing apparatus, a RTC of a main chip and a RTC of a power supply chip are synchronized before power supply of the main chip is stopped, and the RTC of the main chip is synchronized with the time of the RTC of the power supply chip after the power supply of the main chip is restored. In this way, the RTC uses continuous time information before and after the stop. The present disclosure is capable of being applied to, for example, a GPS module in which a digital circuit includes a plurality of chips.

Signal processing apparatus and method

Growing community of inventors

Kanagawa, Japan

Yutaka Takagi