Semiconductor Energy Laboratory Co., Ltd.

Kasai Kogyo Co., Ltd.

Nissan Motor Company Limited

Kasni Kogyo Co., Ltd.

Yutaka Okazaki

Shunpei Yamazaki

Shinya Sasagawa

Naoto Yamade

Hideomi Suzawa

Atsuo Isobe

Tetsuhiro Tanaka

Akihisa Shimomura

Daisuke Matsubayashi

Motomu Kurata

Yuhei Sato

Tomoaki Moriwaka

Takashi Ohtsuki

Yoshinobu Asami

Junichi Koezuka

Tomoya Takeshita

Satoru Okamoto

Keitaro Imai

Naoki Okuno

Daigo Ito

Takahisa Ishiyama

Toshinari Sasaki

Kosei Noda

Hiromichi Godo

Yuta Endo

Yoshiaki Yamamoto

Yoshitaka Yamamoto

Takashi Hamada

Yasumasa Yamane

Kazuya Hanaoka

Toshihiko Takeuchi

Sachiaki Tezuka

Masaharu Nagai

Hitomi Sato

Mizuho Ikarashi

Hidekazu Miyairi

Kensuke Yoshizumi

Yuichi Sato

Katsuaki Tochibayashi

Yoshiaki Kazama

Yutaka Shionoiri

Takanori Matsuzaki

Shuhei Nagatsuka

Tatsuya Onuki

Tomoaki Atsumi

Susumu Kawashima

Munehiro Kozuma

Hidetomo Kobayashi

Yuki Okamoto

Takuya Tsurume

Hiroaki Honda

Hiroshi Fujiki

Suguru Hondo

Hiroki Komagata

Makoto Tamuraya

Shoichiro Obara

Hiroaki Wakisaka

Mitsuru Akiyama

Hiroyuki Takeda

Minoru Tagami

Akira Kanashiki

The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.

Semiconductor device

A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A transistor having a large amount of on-state current is provided. A semiconductor device including the transistor is provided. A semiconductor device with high integration is provided. A novel capacitor is provided. The capacitor includes a first conductor, a second conductor, and an insulator. The first conductor includes a region overlapping with the second conductor with the insulator provided therebetween. The first conductor includes tungsten and silicon. The insulator includes a silicon oxide film that is formed by oxidizing the first conductor.

Method for forming capacitor, semiconductor device, module, and electronic device

A transistor in which a short-channel effect is not substantially caused and which has switching characteristics even in the case where the channel length is short is provided. Further, a highly integrated semiconductor device including the transistor is provided. A short-channel effect which is caused in a transistor including silicon is not substantially caused in the transistor including an oxide semiconductor film. The channel length of the transistor including the oxide semiconductor film is greater than or equal to 5 nm and less than 60 nm, and the channel width thereof is greater than or equal to 5 nm and less than 200 nm. At this time, the channel width is made 0.5 to 10 times as large as the channel length.

A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor. One or more of the first to third conductors include a region containing tungsten and one or more elements selected from silicon, carbon, germanium, tin, aluminum, and nickel.

The invention of the application is the invention regarding a semiconductor device and a method for driving the semiconductor device. The semiconductor device includes first and second transistors, first to fifth switches, first to third capacitors, and a display element. The first transistor (M) comprises a back gate, a gate of the first transistor is electrically connected to the first switch (M), the second switch (M) and the first capacitor (C) are positioned between the gate of the first transistor and a source of the first transistor, the back gate of the first transistor is electrically connected to the third switch (M), the second capacitor (C) is positioned between the back gate of the first transistor and the source of the first transistor, the source of the first transistor is electrically connected to the fourth switch (M) and a drain of the second transistor (M), a gate of the second transistor is electrically connected to the fifth switch (M), the third capacitor (C) is positioned between the gate of the second transistor and a source of the second transistor, and the source of the second transistor is electrically connected to the display element ().

Semiconductor device and method for driving semiconductor device

To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.

Wiring layer and manufacturing method therefor

A semiconductor device includes a first oxide insulating layer over a first insulating layer, an oxide semiconductor layer over the first oxide insulating layer, a source electrode layer and a drain electrode layer over the oxide semiconductor layer, a second insulating layer over the source electrode layer and the drain electrode layer, a second oxide insulating layer over the oxide semiconductor layer, a gate insulating layer over the second oxide insulating layer, a gate electrode layer over the gate insulating layer, and a third insulating layer over the second insulating layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer. A side surface portion of the second insulating layer is in contact with the second oxide insulating layer. The gate electrode layer includes a first region and a second region. The first region has a width larger than that of the second region.

Semiconductor device and manufacturing method thereof

Growing community of inventors

Kanagawa, Japan

Yutaka Okazaki