Panasonic Intellectual Property Management Co., Ltd.

Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Yutaka Hirose

Tsuyoshi Tanaka

Yoshihisa Kato

Mitsuyoshi Mori

Kaoru Inoue

Motonori Ishii

Yoshito Ikeda

Toru Okino

Yasuhiro Uemoto

Yusuke Sakata

Ryohei Miyagawa

Daisuke Ueda

Katsunori Nishii

Shota Yamada

Yoshiyuki Matsunaga

Tomohiro Murata

Hiroshi Masuda

Akito Inoue

Hitoshi Kuriyama

Manabu Yanagihara

Masahiro Hikita

Yoshihide Sawada

Hiroaki Ueno

Tetsuzo Ueda

Masashi Murakami

Yoshihiro Sato

Shigetaka Kasuga

Taichi Sato

Yoshiaki Satou

Seiji Yamahira

Shigeru Saitou

Manabu Usuda

Yuki Sugiura

Yoshiyuki Ohmori

Hiroyuki Mori

Yusuke Otake

Keisuke Yazawa

Yasuhiro Shimada

Takahiko Murata

Hideto Motomura

Akihiro Odagawa

Takayoshi Yamada

Shinzo Koyama

Keisuke Tanaka

Nobukazu Teranishi

Satoshi Nakazawa

Hiroyuki Doi

Masafumi Tsutsui

Masato Takemoto

Kimiaki Toshikiyo

Akio Oki

Kazuo Fujiwara

Atsuhiko Kanda

Manabu Kamoshida

An imaging device includes: one or more pixels, each of the one or more pixels including a photoelectric converter including a first electrode, a second electrode, a photoelectric conversion layer that converts incident light into a signal charge, and a blocking layer; and a charge accumulation region that is coupled to the second electrode, and that accumulates the signal charge. An energy barrier of the blocking layer against migration of a charge having an opposite polarity to a polarity of the signal charge from the second electrode to the photoelectric conversion layer is larger than or equal to 1.8 eV, and an energy barrier of the blocking layer against migration of the charge from the photoelectric conversion layer to the second electrode is smaller than or equal to 1.6 eV.

Imaging device

An imaging device including a photoelectric converter that generates signal charge; a charge storage region that stores the signal charge; a first transistor that has a gate coupled to the charge storage region and reads out the signal charge; a second transistor that has a source and a drain, an output of the first transistor being fed back to one of the source and the drain and being supplied to the charge storage region from the other of the source and the drain; and voltage supply circuitry that supplies voltages varying with time. In a reset operation for discharging the signal charge stored in the charge storage region, the voltage supply circuitry supplies the voltages to a gate of the second transistor.

Solid-state imaging apparatus and method of driving the same

An imaging device includes: a solid-state imaging element having a plurality of pixel cells arranged in a matrix; and a signal processing part configured to process a detection signal outputted from each of the pixel cells. The pixel cells each include an avalanche photodiode and output a voltage corresponding to a count number of photons received by the avalanche photodiode as the detection signal. The signal processing part includes a variation calculation part configured to calculate a variation between the pixel cells in the detection signal outputted from each of the pixel cells, and a correction calculation part configured to correct the detection signal outputted from each of the pixel cells, on the basis of the variation calculated by the variation calculation part.

A photodetector includes: a semiconductor substrate having a first main surface and a second main surface; a first semiconductor layer that is of a first conductivity type, and is included in the semiconductor substrate and closer to the first main surface than to the second main surface; a second semiconductor layer that is of a second conductivity type different from the first conductivity type, and is included in the semiconductor substrate and interposed between the first semiconductor layer and the second main surface; a multiplication region that causes avalanche multiplication to a charge generated in the semiconductor substrate through photoelectric conversion; a circuit region disposed alongside the first semiconductor layer in a direction parallel to the first main surface; at least one isolation transistor disposed in the circuit region; and an isolation region interposed between the first semiconductor layer and the circuit region.

Photodetector

An imaging device includes: a solid-state imaging element having a plurality of pixel cells arranged in a matrix; and a control part configured to control the solid-state imaging element. The pixel cells each include an avalanche photodiode, a floating diffusion part configured to accumulate electric charges, a transfer transistor connecting a cathode of the avalanche photodiode and the floating diffusion part, and a reset transistor for resetting electric charges accumulated in the floating diffusion part. The control part controls the reset transistor to discharge electric charges exceeding a predetermined electric charge amount, of electric charges accumulated in the floating diffusion part from the cathode of the avalanche photodiode via the transfer transistor.

Imaging device for reducing variations of amounts of electric charges accumulated in floating diffusion regions

A flame detection system includes a determiner and an outputter. The determiner is configured to, when image processing performed on image data detects ultraviolet light, determine that a light emitting source is a fire flame. The outputter is configured to output a determination result by the determiner.

Flame detection system, reporting system, flame detection method, and non-transitory storage medium

An imaging device including: a photoelectric converter that generates signal charge; a charge storage region that stores the signal charge; a first transistor that has a gate coupled to the charge storage region and reads out the signal charge; a second transistor that, has a source and a drain, an output of the first transistor being fed back to one of the source and the drain and being supplied to the charge storage region from the other of the source and the drain; and voltage supply circuitry that supplies voltages varying with time. In a reset operation for discharging the signal charge stored in the charge storage region, the voltage supply circuitry supplies the voltages to a gate of the second transistor so that the second transistor gradually changes from an OFF state to an ON state.

An imaging device including a semiconductor substrate that includes a first impurity region; a photoelectric converter that is coupled to the first impurity region and that converts light into charges; a capacitor that includes a first terminal and a second terminal, the first terminal coupled to the first impurity region; voltage supply circuitry coupled to the second terminal; a first transistor including the first impurity region as a source or a drain; and control circuitry. The control circuitry is programmed to cause the voltage supply circuitry to supply a first voltage in a first period, and to cause the voltage supply circuitry to supply a second voltage different from the first voltage in a second period continuous to the first period, the first transistor being in on-state in the first period, the first transistor being in off-state in the second period.

The photosensor includes an APD that has a multiplication region including a photoelectric converter and includes a first capacitor connected to the multiplication region in parallel, and a first transistor connected between the APD and a first power supply (voltage VC). The first transistor applies a reverse bias of a power supply voltage (VC-VA), which is larger than a breakdown voltage VBD, between an anode and a cathode of the APD during a bias setting period by connecting the APD to the first power supply, and stops an avalanche multiplication phenomenon during a light exposing period by disconnecting the APD from the first power supply to accumulate charges generated by the avalanche multiplication phenomenon in the first capacitor.

Photosensor, image sensor, and photosensor driving method

A solid-state image sensor capable of detecting a photon and having smaller circuit scale is provided. The solid-state image sensor includes a pixel array including a plurality of pixel cells, a pixel driving circuit configured to drive the plurality of pixel cells, a readout circuit, and a plurality of readout wires corresponding to respective columns of the pixel cell. Each of the plurality of pixel cells includes an avalanche photodiode configured to detect a photon by avalanche multiplication occurring when one photon enters, and a transfer transistor configured to transfer a detection result of the photon to the corresponding readout wire. The readout circuit determines whether a photon is detected or not, and outputs a determination result.

Solid-state image sensor and imaging system

An imaging device includes a semiconductor substrate that includes a first impurity region having n-type conductivity; a photoelectric converter that is electrically connected to the first impurity region and that converts light into charges; a capacitor that includes a first terminal and a second terminal, the first terminal being electrically connected to the first impurity region; and a voltage supply circuit electrically connected to the second terminal. The voltage supply circuit is configured to generate a first voltage and a second voltage different from the first voltage. The first impurity region accumulates positive charges generated by the photoelectric converter.

A photodiode that multiplies a charge generated by photoelectric conversion in an avalanche region includes: a p&#x2212; type semiconductor layer having interfaces; an n+ type semiconductor region located inside the p&#x2212; type semiconductor layer and in contact with the interface; an n+ type semiconductor region located inside the p&#x2212; type semiconductor layer and connected to the n+ type semiconductor region; and a p type semiconductor region located between the n+ type semiconductor region and the interface, wherein the n+ type semiconductor region, the n+ type semiconductor region, and the p type semiconductor region each have a higher impurity concentration than the p&#x2212; type semiconductor layer, the avalanche region is a region between the n+ type semiconductor region and the p type semiconductor region inside the p&#x2212; type semiconductor layer, and the n+ type semiconductor region has a smaller area than the n+ type semiconductor region in planar view.

Photodiode, photodiode array, and solid-state imaging device

An imaging system includes: an image sensor sensitive to ultraviolet light and visible light; a lens configured to focus light from a subject onto the image sensor; and an image processor configured to process image signals output from the image sensor. The image processor obtains the difference between image signals Aand Aoutput from the image sensor at times t1 and t2, respectively. If the differential signal Ais greater than or equal to a predetermined value, the image processor determines that light from the subject contains the ultraviolet light, and generates an image signal CI based on the differential signal A

Imaging system, and method for specifying UV emission location using same

An imaging device includes a photoelectric converter generating signal charge; a charge storage region storing the signal charge; a first transistor having a gate coupled to the charge storage region; a second transistor having a source and a drain; and voltage supply circuitry supplying voltages varying with time. An output of the first transistor is fed back to the second transistor and is supplied to the charge storage region. A reset operation for discharging the signal charge in the charge storage region includes a first reset operation and a second reset operation. In the first reset operation, the second transistor changes from an OFF state to an ON state and then changes to an OFF state. In the second reset operation, the voltage supply circuitry supplies the voltages to a gate of the second transistor so that the second transistor gradually changes from an OFF state to an ON state.

Growing community of inventors

Kyoto, Japan

Yutaka Hirose